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NDD02N40T4G Datasheet(PDF) 1 Page - ON Semiconductor |
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NDD02N40T4G Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2014 July, 2014 − Rev. 4 1 Publication Order Number: NDD02N40/D NDD02N40, NDT02N40 N-Channel Power MOSFET 400 V, 5.5 W Features • 100% Avalanche Tested • These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol NDD NDT Unit Drain−to−Source Voltage VDSS 400 V Gate−to−Source Voltage VGS ±20 V Continuous Drain Current RqJC Steady State, TC = 25°C (Note 1) ID 1.7 0.4 A Continuous Drain Current RqJC Steady State, TC = 100°C (Note 1) ID 1.1 0.25 A Power Dissipation – RqJC Steady State, TC = 25°C PD 39 2.0 W Pulsed Drain Current IDM 6.9 1.6 A Continuous Source Current (Body Diode) IS 1.7 0.4 A Single Pulse Drain−to−Source Avalanche Energy, ID = 1 A EAS 120 mJ Maximum Temperature for Soldering Leads TL 260 °C Operating Junction and Storage Temperature TJ, TSTG −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Limited by maximum junction temperature 2. IS = 1.7 A, di/dt ≤ 100 A/ms, VDD ≤ BVDSS, TJ = +150°C THERMAL RESISTANCE Parameter Symbol Value Unit Junction−to−Case (Drain) NDD02N40 RqJC 3.2 °C/W Junction−to−Ambient Steady State NDD02N40 (Note 4) NDD02N40−1 (Note 3) NDT02N40 (Note 4) NDT02N40 (Note 5) RqJA 39 96 62 151 °C/W 3. Insertion mounted 4. Surface mounted on FR4 board using 1 ″ sq. pad size (Cu area = 1.127 ″ sq. [2 oz] including traces) 5. Surface−mounted on FR4 board using minimum recommended pad size (Cu area = 0.026” sq. [2 oz]). http://onsemi.com V(BR)DSS RDS(ON) MAX 400 V 5.5 W @ 10 V N−Channel MOSFET D (2) S (3) G (1) MARKING DIAGRAMS Y = Year WW = Work Week 2N40 = Device Code G = Pb−Free Package See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. ORDERING INFORMATION 1 Gate 3 Source 2 Drain 4 Drain DPAK CASE 369C (Surface Mount) STYLE 2 1 2 3 4 1 Gate 3 Source 2 Drain 4 Drain IPAK CASE 369D (Straight Lead) STYLE 2 1 2 3 4 A = Assembly Location Y = Year W = Work Week 2N40 = Specific Device Code G = Pb−Free Package AYW 2N40 G G (*Note: Microdot may be in either location) SOT−223 CASE 318E STYLE 3 1 2 3 4 2 Drain 1 Gate 3 Source 4 Drain |
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