LM82

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SNIS113D – JANUARY 2000 – REVISED MARCH 2013

Command Select

Power On Default State

Register Name

Register Function

Address

<P7:P0> hex

<D7:D0> binary

<D7:D0> decimal

50h

0111 1111

127

Reserved

51h

Reserved for Future Use

52h

0111 1111

127

Reserved

53h-59h

Reserved for Future Use

5Ah

0111 1111

127

WTCS

Write T_CRIT Setpoint

5Ch-6Fh and F0h-

Reserved for Future Use

FDh

FEh

0000 0001

1

RMID

Read Manufacturers ID

FFh

0000 0011

3

RSR

Read Stepping or Die Revision Code

LOCAL and REMOTE TEMPERATURE REGISTERS (LT, and RT)

Table 1. LOCAL and REMOTE TEMPERATURE REGISTERS (LT, and RT) (Read Only Address 00h, and

01h):

D7

D6

D5

D4

D3

D2

D1

D0

MSB

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

LSB

D7–D0: Temperature Data. One LSB = 1°C. Two's complement format.

STATUS REGISTER

Table 2. STATUS REGISTER (Read Only Address 02h):

D7

D6

D5

D4

D3

D2

D1

D0

0

LHIGH

0

RHIGH

0

OPEN

RCRIT

LCRIT

Power up default is with all bits “0” (zero).

D0: LCRIT: When set to a 1 indicates an Local Critical Temperature alarm.

D1: RCRIT: When set to a 1 indicates a Remote Diode Critical Temperature alarm.

D2: D2OPEN: When set to 1 indicates a Remote Diode disconnect.

D4: D2RHIGH: When set to 1 indicates a Remote Diode HIGH Temperature alarm.

D6: LHIGH: When set to 1 indicates a Local HIGH Temperature alarm.

D7, D5, and D3: These bits are always set to 0 and reserved for future use.

MANUFACTURERS ID AND DIE REVISION (Stepping) REGISTERS

MANUFACTURERS ID AND DIE REVISION (Stepping) REGISTERS (Read Address FEh and FFh) Default

value 01h for Manufacturers ID(FEh ).

CONFIGURATION REGISTER

Table 3. CONFIGURATION REGISTER (Read Address 03h/Write Address 09h):

D7

D6

D5

D4

D3

D2

D1

D0

INT mask

0

Remote

Remote

Remote

Local

INT Inversion

0

T_CRIT_A

T_CRIT_A

T_CRIT_A

T_CRIT_A

mask

mask

mask

mask

Power up default is with all bits “0” (zero).

D7: INT mask: When set to 1 INT interrupts are masked.

D5: T_CRIT mask, this bit must be set to a 1 before the T_CRIT setpoint is lowered below 127 in order for

T_CRIT_A pin to function properly.

Copyright © 2000–2013, Texas Instruments Incorporated

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