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ATMEGA32-16PI Datasheet(PDF) 30 Page - ATMEL Corporation |
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ATMEGA32-16PI Datasheet(HTML) 30 Page - ATMEL Corporation |
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30 / 317 page  30 ATmega32(L) 2503F–AVR–12/03 Power Management and Sleep Modes Sleep modes enable the application to shut down unused modules in the MCU, thereby saving power. The AVR provides various sleep modes allowing the user to tailor the power consumption to the application’s requirements. To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction. See Table 13 for a summary. If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and resumes execution from the instruc- tion following SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up from sleep. If a Reset occurs during sleep mode, the MCU wakes up and executes from the Reset Vector. Figure 11 on page 22 presents the different clock systems in the ATmega32, and their distribution. The figure is helpful in selecting an appropriate sleep mode. MCU Control Register – MCUCR The MCU Control Register contains control bits for power management. • Bit 7 – SE: Sleep Enable The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmers purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of the SLEEP instruction and to clear it immediately after wak- ing up. • Bits 6...4 – SM2..0: Sleep Mode Select Bits 2, 1, and 0 These bits select between the six available sleep modes as shown in Table 13. Note: 1. Standby mode and Extended Standby mode are only available with external crystals or resonators. Bit 765 43 21 0 SE SM2 SM1 SM0 ISC11 ISC10 ISC01 ISC00 MCUCR Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 000 00 00 0 Table 13. Sleep Mode Select SM2 SM1 SM0 Sleep Mode 000 Idle 0 0 1 ADC Noise Reduction 010 Power-down 011 Power-save 100 Reserved 101 Reserved 1 1 0 Standby(1) 1 1 1 Extended Standby(1) |
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