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LM95241 Datasheet(PDF) 7 Page - Texas Instruments |
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LM95241 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 30 page SNP GND D1 PIN GND PIN D1 V+ 6.5V D3 ESD CLAMP D2 V+ GND ESD Clamp 6.5V D1 D2 D3 160 k 80 k VIH VIL SMBCLK P S VIH VIL SMBDAT tBUF tHD;STA tLOW tR tHD;DAT tHIGH tF tSU;DAT tSU;STA tSU;STO P S LM95241 www.ti.com SNIS143E – AUGUST 2006 – REVISED MARCH 2013 Logic Electrical Characteristics SMBus Digital Switching Characteristics (continued) Unless otherwise noted, these specifications apply for VDD=+3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines = 80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted. The switching characteristics of the LM95241 fully meet or exceed the published specifications of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95241. They adhere to but are not necessarily the SMBus bus specifications. Symbol Parameter Conditions Typical(1) Limits(2) Units (Limit) tBUF SMBus Free Time Between Stop and Start 1.3 µs (min) Conditions Figure 2. SMBus Communication Table 1. Parasitic components and ESD protection circuitry Pin Label Circ All Input ESD Protection Structure Circuits # uit 1 D1+ A 2 D1 − A 3 D2+ A 4 D2 − A 5 GND B 6 VDD B 7 SMBDAT C 8 SMBCLK C Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM95241 |
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