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LM95231 Datasheet(PDF) 14 Page - Texas Instruments

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Part No. LM95231
Description  Precision Dual Remote Diode Temperature Sensor with SMBus Interface and TruTherm??Technology
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM95231 Datasheet(HTML) 14 Page - Texas Instruments

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D7
D6
D5
D4
D3
D2
D1
D0
1
9
1
9
Ack
by
LM95231
Start by
Master
Repeat
Start by
Master
R/W
Frame 1
Serial Bus Address Byte
Frame 2
Command Byte
Ack
by
LM95231
D7
D6
D5
D4
D3
D2
D1
D0
1
9
1
9
Ack
by
LM95231
R/W
Frame 3
Serial Bus Address Byte
Frame 4
Data Byte from the LM95231
No Ack
by
Master
Stop
by
Master
SMBCLK
SMBDAT
SMBCLK
(Continued)
SMBDAT
(Continued)
A5
A3
A2
A0
A6
A4
A1
A5
A3
A2
A0
A6
A4
A1
D7
D6
D5
D4
D3
D2
D1
D0
1
9
1
9
Ack
by
LM95231
Start by
Master
R/W
Frame 1
Serial Bus Address Byte
Frame 2
Data Byte from the LM95231
NoAck
by
Master
SMBCLK
SMBDAT
Stop
by
Master
A5
A3
A2
A0
A6
A4
A1
D7
D6
D5
D4
D3
D2
D1
D0
1
9
1
9
Ack
by
LM95231
Start by
Master
R/W
Frame 1
Serial Bus Address Byte
Frame 2
Command Byte
Ack
by
LM95231
D7
D6
D5
D4
D3
D2
D1
D0
1
9
Frame 3
Data Byte
Ack by
LM95231
Stop
by
Master
SMBCLK
SMBDAT
SMBCLK
(Continued)
SMBDAT
(Continued)
A5
A3
A2
A0
A6
A4
A1
LM95231
SNIS139E – FEBRUARY 2005 – REVISED MARCH 2013
www.ti.com
Figure 8. Serial Bus Write to the internal Command Register followed by a Data Byte
Figure 9. Serial Bus byte Read from a Register with the internal Command Register preset to desired
value.
(d) Serial Bus Write followed by a Repeat Start and Immediate Read
Figure 10. SMBus Timing Diagrams for Access of Data
SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the LM95231 is transmitting on the SMBDAT line, the
LM95231 must be returned to a known state in the communication protocol. This may be done in one of two
ways:
1. When SMBDAT is LOW, the LM95231 SMBus state machine resets to the SMBus idle state if either
SMBDAT or SMBCLK are held low for more than 35ms (tTIMEOUT). Note that according to SMBus
specification 2.0 all devices are to timeout when either the SMBCLK or SMBDAT lines are held low for 25-
35ms. Therefore, to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held
low for at least 35ms.
14
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Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM95231


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