Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

NWK933 Datasheet(PDF) 3 Page - Mitel Networks Corporation

Part # NWK933
Description  3.3V 10/100 Fast Ethernet Transceiver to MII
Download  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

NWK933 Datasheet(HTML) 3 Page - Mitel Networks Corporation

  NWK933 Datasheet HTML 1Page - Mitel Networks Corporation NWK933 Datasheet HTML 2Page - Mitel Networks Corporation NWK933 Datasheet HTML 3Page - Mitel Networks Corporation NWK933 Datasheet HTML 4Page - Mitel Networks Corporation NWK933 Datasheet HTML 5Page - Mitel Networks Corporation NWK933 Datasheet HTML 6Page - Mitel Networks Corporation NWK933 Datasheet HTML 7Page - Mitel Networks Corporation NWK933 Datasheet HTML 8Page - Mitel Networks Corporation NWK933 Datasheet HTML 9Page - Mitel Networks Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 18 page
background image
3
NWK933
The Manchester data stream will be decoded into a 4-
bit parallel data bus, RXD[3:0]. The RXD bus is clocked
out on RX_CLK rising. The NWK933 must detect the
first 4 bits of pre-amble before RX_DV is set high.
When RX_DV is high, any Manchester coding violation
will set RX_ER high. RX_DV is reset by a continuous
sequence of zeroes, or by the end-of-packet IDLE
terminator (11 11 00 00). Whilst RX_DV is low, the
data is invalid.
100MHz Synthesizer
This synthesizer employs a delay-locked loop (DLL)
to generate a 100MHz timing reference from the 25MHz
reference clock. This 100MHz reference is used by
the 10BASE-T transmit and receive functions and is
divided by 5 to provide a 20MHz data strobe. The
20MHz clock is used to derive the 2.5 MHz TX_CLK in
10BASE-T mode. The synthesizer is disabled when
not in 10BASE-T mode.
TX10 Pulse Shaper & Filter
The Pulse Shaper & Filter employs a digital Finite
Impulse Response filter (FIR) to pre-compensate for
line distortion and to remove high frequency
components in accordance with the 802.3 Standard.
The Pulse Shaper & Filter is disabled when not in
10BASE-T mode.
TX10 Latency
When connected to appropriate magnetics the latency
through the TX10 path is less than 2BT (200ns) for
data transmissions. This timing is measured from the
rising edge of TX_CLK to the output of the transmit
magnetics. The TX10 path will not transmit up to the
first two Manchester encoded bits of a data
transmission, as permitted by the 802.3 Standard.
RX10 Filter & RX10 Signal Detect
These blocks work in unison to remove noise and to
block signals that do not achieve the voltage levels
specified in 802.3. Signals that do not achieve the
required level are not sampled in the Clock Recovery
block and are not passed to the outputs.
RX10 Latency
When connected to appropriate magnetics the latency
through the RX10 path is less than 6BT (600ns). This
timing is measured from the input of the receive
magnetics to the rising edge of RX_CLK. The RX10
path may ignore up to three Manchester encoded bits
at the start of data reception (802.3 allows up to 5
bits).
100Base-TX Operation
100Mb/s Data Exchange on the MII Interface
100Mb/s data is transferred across the MII with clock
speeds of 25MHz. The MAC outputs data to the
NWK933 via the MII interface, on the TXD[3:0] bus.
This data is synchronised to the rising edge of TX_CLK.
To indicate that there is valid data for transmission on
the MII, the MAC sets the TX_EN signal active. This
forces the NWK933 device to take in the data on the
TXD[3:0] bus and replace the first octet of the MAC
preamble with Start-of-Stream Delimiter (SSD) symbols
to indicate the start of the Physical Layer Stream.
When the data transfer across the MII is complete, the
MAC deasserts the TX_EN signal and the NWK933
adds End-of-Stream Delimiters (ESD) symbols onto
the end of the data stream. The complete data stream
(the Physical Layer Stream) is encoded from 4 bits
into 5 bits, scrambled, converted to MLT3 and driven
to the TXOP and TXON pin differentially.
The TX100 path is disabled when not in 100BASE-TX
mode and, with the exception of the RX100 Signal
Detect, the RX100 Receive Path is disabled when not in
100BASE-TX mode.
125MHz Synthesizer
This synthesizer employs a phase-locked loop (PLL) to
generate a 125MHz timing reference from the 25MHz
reference clock. This 125MHz reference is used by the
100BASE-TX transmit function and is divided by 5 to
provide a 25MHz data strobe on TX_CLK. TX_CLK is
frequency and phase locked to the 25MHz reference
with a small phase offset. The synthesizer is disabled
when not in 100BASE-TX mode.


Similar Part No. - NWK933

ManufacturerPart #DatasheetDescription
logo
Zarlink Semiconductor I...
NWK935 ZARLINK-NWK935 Datasheet
159Kb / 9P
   PHY/PMD High Speed Copper Media Transceiver
More results

Similar Description - NWK933

ManufacturerPart #DatasheetDescription
logo
Zarlink Semiconductor I...
MT933 ZARLINK-MT933 Datasheet
360Kb / 20P
   3.3V 10/100 Fast Ethernet Transceiver to MII
logo
STMicroelectronics
STE101P STMICROELECTRONICS-STE101P Datasheet
103Kb / 5P
   10/100 Fast ethernet 3.3V transceiver
STE100P STMICROELECTRONICS-STE100P_06 Datasheet
348Kb / 31P
   10/100 FAST ETHERNET 3.3V TRANSCEIVER
STE100P STMICROELECTRONICS-STE100P Datasheet
193Kb / 29P
   10/100 FAST ETHERNET 3.3V TRANSCEIVER
logo
Intel Corporation
LXT9763 INTEL-LXT9763 Datasheet
1Mb / 74P
   Fast Ethernet 10/100 Hex Transceiver with Full MII
LXT9762 INTEL-LXT9762 Datasheet
1Mb / 78P
   Fast Ethernet 10/100 Multi-Port Transceiver with Serial MII
logo
List of Unclassifed Man...
IP101GRI ETC-IP101GRI Datasheet
3Mb / 65P
   Single Port 10/100 MII/RMII/TP/Fiber Fast Ethernet Transceiver
January 14, 2014
logo
SMSC Corporation
LAN83C180 SMSC-LAN83C180 Datasheet
181Kb / 10P
   10/100 FAST ETHERNET PHY TRANSCEIVER
LAN83C180 SMSC-LAN83C180_01 Datasheet
163Kb / 22P
   10/100 Fast Ethernet PHY Transceiver
logo
Microchip Technology
LAN88730 MICROCHIP-LAN88730 Datasheet
918Kb / 82P
   Small Footprint MII/RMII 10/100 Ethernet Transceiver for Automotive Applications
07/14/15
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com