MT9092

7-26

ADDRESSES 0Ch and 0Dh are RESERVED

Note: Bits marked "-" are reserved bits and should be written with logic "0".

Side-tone Gain

Setting (dB)

(default) OFF

-9.96

-6.64

-3.32

0

3.32

6.64

9.96

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

0

1

0

1

0

1

0

1

FCODEC Gain Control Register 2

ADDRESS = 0Bh WRITE/READ VERIFY

Power Reset Value

0X00 X000

76543210

--

-

Gain (dB)

0 (default)

-8

-16

-24

0

0

1

1

0

1

0

1

PuFC

When high, the Filter/CODEC is powered up. When low, the Filter/CODEC is powered down. If PuFC, SPKR EN and

HSSPKR EN are all low then the VRef/VBias circuit is also powered down.

Tfhp

When high, an additional high pass function (passband beginning at 400Hz) is inserted into the transmit path. When

low, this highpass filter is disabled.

DIAL EN

When high, a first order lowpass filter is inserted into the receive path (3dB = 1kHz). When low, this lowpass filter is

disabled.

SIDE EN

MIC EN

When high, the selected transmit microphone is enabled to the transmit filter section. When low, the microphone

path is muted.

MIC/HNSTMIC

When high, the handsfree microphone (pins MIC±) is muxed into the transmit path. When low, the handset

microphone (pins M±) is muxed into the transmit path. Both are contingent on 'MIC EN".

SPKR EN

When high, the handsfree loudspeaker driver is powered up. When low, this driver is powered down.

HSSPKR EN

When high, the handset speaker driver is powered up. When low, this driver is powered down.

Transducer Control Register

ADDRESS = 0Eh WRITE/READ VERIFY

Power Reset Value

0000 0000

76

543

2

1

0

PuFC

Tfhp

DIAL

SIDE

MIC/

SPKR

HSSPKR

MIC

EN

EN

EN

HNSTMIC

EN

EN