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MT9074 Datasheet(PDF) 18 Page - Mitel Networks Corporation |
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MT9074 Datasheet(HTML) 18 Page - Mitel Networks Corporation |
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18 / 122 page  MT9074 Advance Information 18 position one of the four FASs of the following submultiframe before it is transmitted (see Table 12). The submultiframe is then transmitted and, at the far end, the same process occurs. That is, a CRC-4 remainder is generated for each received submultiframe. These bits are compared with the bits received in position one of the four FASs of the next received submultiframe. This process takes place in both directions of transmission. When more than 914 CRC-4 errors (out of a possible 1000) are counted in a one second interval, the framing algorithm will force a search for a new basic frame alignment. See Frame Algorithm section for more details. The result of the comparison of the received CRC-4 remainder with the locally generated remainder will be transported to the far end by the E-bits. Therefore, if E1 = 0, a CRC-4 error was discovered in a submultiframe 1 received at the far end; and if E2 = 0, a CRC-4 error was discovered in a submultiframe 2 received at the far end. No submultiframe sequence numbers or re-transmission capabilities are supported with layer 1 PCM 30 protocol. See ITU-T G.704 and G.706 for more details on the operation of CRC-4 and E-bits. There are two CRC multiframe alignment algorithm options selected by the AUTC control bit (address 10H, page 01H). When AUTC is zero, automatic CRC-to-non-CRC interworking is selected. When AUTC is one and ARAI is low, if CRC-4 multiframe alignment is not found in 400 msec, the transmit RAI will be continuously high until CRC-4 multiframe alignment is achieved. The control bit for transmit E bits (TE, address 11H of page 01H) will have the same function in both states of AUTC. That is, when CRC-4 synchronization is not achieved the state of the transmit E-bits will be the same as the state of the TE control bit. When CRC-4 synchronization is achieved the transmit E-bits will function as per ITU- T G.704. Table 12 outlines the operation of the AUTC, ARAI and TALM control bits of the MT9074. CAS Signalling Multiframing in E1 mode The purpose of the signalling multiframing algorithm is to provide a scheme that will allow the association of a specific ABCD signalling nibble with the appropriate PCM 30 channel. Time slot 16 is reserved for the communication of Channel Associated Signalling (CAS) information (i.e., ABCD signalling bits for up to 30 channels). Refer to ITU-T Table 12 - Operation of AUTC, ARAI and TALM Control Bits (E1 Mode) AUTC ARAI TALM Description 0 0 X Automatic CRC-interworking is activated. If no valid CRC MFAS is being received, transmit RAI will flicker high with every reframe (8msec.), this cycle will continue for 400 msec., then transmit RAI will be low continuously. The device will stop searching for CRC MFAS, continue to transmit CRC-4 remainders, stop CRC-4 processing, indicate CRC-to-non-CRC operation and transmit E-bits to be the same state as the TE control bit (page 01H, address 16H). 0 1 0 Automatic CRC-interworking is activated. Transmit RAI is low continuously. 0 1 1 Automatic CRC-interworking is activated. Transmit RAI is high continuously. 1 0 X Automatic CRC-interworking is de-activated. If no valid CRC MFAS is being received, transmit RAI flickers high with every reframe (8 msec.), this cycle continues for 400 msec, then transmit RAI becomes high continuously. The device continues to search for CRC MFAS and transmit E-bits are the same state as the TE control bit. When CRCSYN = 0, the CRC MFAS search is terminated and the transmit RAI goes low. 1 1 0 Automatic CRC-interworking is de-activated. Transmit RAI is low continuously. 1 1 1 Automatic CRC-interworking is de-activated. Transmit RAI is high continuously. |
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Similar Description - MT9074 |
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