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NCP1124AP100G Datasheet(PDF) 3 Page - ON Semiconductor |
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NCP1124AP100G Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 18 page NCP1124, NCP1126, NCP1129 www.onsemi.com 3 Figure 2. Functional Block Diagram VCC and logic management double hiccup Clamp R S Q Q Power on reset 65/100 kHz clock + − Frequency foldback + − LEB R S Q Q Vcc Drain Source Power On Reset + GND CS FB VDD 4 ms 5 s Frequency Modulation Slope Compensation 250 mV Peak Current Freeze The soft start is activated − startup process − auto recovery RFB /4 Vskip Rramp Vfold VDD VILIM Ipflag 4 k W VOVP RLIM UVLO Ipflag VDD − + + − + − |
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