NCP1602

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3

EMI

Filter

AC line

LOAD

L1

D1

Q1

Vbulk

1

2

34

5

6

FB

VCTRL

CS / ZCD

GND

DRV

VCC

Figure 1. NCP1602 Application Schematic

Table 4. DETAILED PIN DESCRIPTION

Pin Number

Name

Function

1

VCTRL

The error amplifier output is available on this pin. The network connected between this pin

and ground adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve

high Power Factor ratios.

VCTRL pin is internally pulled down when the circuit is off so that when it starts operation, the

power increases slowly to provide a soft−start function.

VCTRL pin must not be controlled or pulled down externally.

2

GND

Connect this pin to the PFC stage ground.

3

CS / ZCD

This pin monitors the MOSFET current to limit its maximum current.

This pin is the output of a resistor bridge connected between the drain and the source of the

4

DRV

The high−current capability of the totem pole gate drive (−0.5/+0.8A) makes it suitable to

effectively drive high gate charge power MOSFETs.

5

VCC

This pin is the positive supply of the IC. The circuit starts to operate when VCC exceeds

17.0 V ([**A] & [**B] Versions) or 10.5 V ([**C] & [**D] Versions) and turns off when VCC

goes below 9.0 V (typical values). After start−up, the operating range is 9.5 V up to 30 V.

6

FB

This pin receives a portion of the PFC output voltage for the regulation and the Dynamic

Response Enhancer (DRE) that drastically speeds−up the loop response when the output

voltage drops below 95.5% of the desired output level.

Under−Voltage (UVP) comparators. The UVP comparator prevents operation as long as FB

still increases, the driver is immediately disabled if the output voltage exceeds 107% of the

desired level (fast OVP).

A 250−nA sink current is built−in to trigger the UVP protection and disable the part if the feed-

back pin is accidently open.