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SG1844 Datasheet(PDF) 2 Page - Microsemi Corporation |
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SG1844 Datasheet(HTML) 2 Page - Microsemi Corporation |
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C URRENT -M ODE PWM C ONTROLLER SG1844/SG1845 Series PRODUCT DA T ABOOK 1996/1997 Copyright © 2000 Rev. 1.4 4/00 2 P RODUCTION D ATA S HEET ABSOLUTE MAXIMUM RATINGS (Notes 1 & 2) Supply Voltage (I CC < 30mA) ............................................................... Self Limiting Supply Voltage (Low Impedance Source) ........................................................ 30V Output Current (Peak) ....................................................................................... ±1A Output Current (Continuous) ....................................................................... 350mA Output Energy (Capacitive Load) ....................................................................... 5µJ Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V Error Amp Output Sink Current ..................................................................... 10mA Operating Junction Temperature Hermetic (J, Y, F, L Packages) ................................................................... 150°C Plastic (N, M, D, DM Packages) ................................................................ 150°C Storage Temperature Range .......................................................... -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) .................................................. 300°C PACKAGE PIN OUTS V REF V CC OUT UT GND COM V FB I SENSE R T/CT 1 8 27 36 45 M & Y PACKAGE (Top View) DM PACKAGE (Top View) V REF V CC OUT UT GND COM V FB I SENSE R T/CT 1 8 27 36 45 V REF N.C. V CC V C OUT UT GND WR GND COM N.C. V FB N.C. I SENSE N.C. R T/CT 1 14 213 312 411 510 69 78 D PACKAGE (Top View) M PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 95°C/W N PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 65°C/W DM PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 165°C/W D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 120°C/W Y PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 130°C/W J PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 80°C/W F PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, θθθθθ JC 80°C/W THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 145°C/W L PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, θθθθθ JC 35°C/W THERMAL RESISTANCE-JUNCTION TO AMBIENT, θθθθθ JA 120°C/W Junction Temperature Calculation: T J = TA + (PD x θJA). The θ JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. THERMAL D ATA Note 1. Exceeding these ratings could cause damage to the device. Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified terminal. 1 14 213 312 411 510 69 78 J & N PACKAGE (Top View) COM N.C. V FB N.C. I SENSE N.C. R T/CT V REF N.C. V CC V C OUT UT GROUND OWER GND F PACKAGE (Top View) 10.V REF 9. V CC 8. V C 7. OUT UT 6. GND 1. COM 2. V FB 3. I SENSE 4. R T/CT 5. OWER GND 1 10 29 38 47 56 L PACKAGE (Top View) 32 4 5 6 7 8 911 10 1. N.C. 2. N.C. 3. COM . 4. N.C. 5. V FB 6. N.C. 7. I SENSE 8. R T/CT 9. N.C. 10. N.C. 120 19 18 17 16 15 14 12 13 11. N.C. 12. WR GND 13. GND 14. N.C. 15. OUT UT 16. N.C. 17. V C 18. V CC 19. N.C. 20. V REF |
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