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NDDL01N60Z Datasheet(PDF) 6 Page - ON Semiconductor |
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NDDL01N60Z Datasheet(HTML) 6 Page - ON Semiconductor |
6 / 9 page NDDL01N60Z, NDTL01N60Z http://onsemi.com 6 TYPICAL CHARACTERISTICS Figure 13. Maximum Rated Forward Biased Safe Operating Area for NDDL01N60Z VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 100 10 1 0.1 0.001 0.1 1 10 t, TIME (s) 1E−03 1E−01 1E−04 1E+00 1E−05 1E−02 1E−06 0.01 0.1 1 10 1E+01 1E+02 1E+03 Single Pulse Duty Cycle = 0.5 0.20 0.10 0.05 0.02 0.01 RqJC steady state = 4.8°C/W VGS ≤ 30 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 10 ms 100 ms 1 ms 10 ms dc 0.01 t, TIME (s) 1E−03 1E−01 1E−04 1E+00 1E−05 1E−02 1E−06 0.01 0.1 1 100 1E+01 1E+02 1E+03 Single Pulse Duty Cycle = 0.5 0.20 0.10 0.05 0.02 0.01 RqJA steady state = 62°C/W Figure 14. Maximum Rated Forward Biased Safe Operating Area for NDTL01N60Z VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 100 10 1 0.1 0.001 0.1 1 10 VGS ≤ 30 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 10 ms 100 ms 1 ms 10 ms dc 0.01 Figure 15. Thermal Impedance (Junction−to−Case) for NDDL01N60Z Figure 16. Thermal Impedance (Junction−to−Ambient) for NDTL01N60Z 10 |
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