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NCP6915 Datasheet(PDF) 10 Page - ON Semiconductor |
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NCP6915 Datasheet(HTML) 10 Page - ON Semiconductor |
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10 / 24 page  NCP6915 http://onsemi.com 10 As the default configuration factory is programmed with disable state for the DCDC and LDOs, an I2C access must be done at the end of the bias time to enable the supplies. In addition a user programmable delay will also take place between end of Core circuitry turn on (Bias time) and Start up time: The PowerSupplies_T[2..0] bits of TIME register will set this user programmable delay with a 128 ms resolution (note: please contact your ON Semiconductor representative for additional resolution options). The output discharge of the DCDC and LDOs are done during this time slot. NOTE: During the Bias time, the I2C interface is not active during the first 50 ms. Any I2C request to the IC during this time period will result in a NACK reply. However, I2C registers can be read and written while HWEN pin is still low (except blanking time of 50 ms typical). By programming the appropriate registers (see registers description section), the power up sequence default can be modified and set upon requirements (please contact your ON representative for additional PUS options) O F F M O D E POR UVLO HWEN (DCDC _T[2:0] + 1) x 128 ms* DVS ramp Time 70 us typ VIN1, VIN2 VOUT DCDC Soft start 90% Bias Time (LDO x_T[2:0] + 1) x 128 ms* VOUT LDOx 128 us I @C S L E E P M O D E 600 ms min Figure 4. Sleep Mode PUS (SMPUS) A third turn on sequence is also available by I2C. Indeed each power supply can be turn off/on through I2C register. In this case no biasing time is required except for DCDC bias time (32 ms typical). POR UVLO HWEN DVS ramp Time VIN1, VIN2 VOUT DCDC Soft start 90% VOUT LDOx 128 us I @C LDOx, DCDC OFF/ ON Bias time 32 ms Figure 5. ON Mode PUS (OPUS) Shutdown by HWEN When HWEN is tied low, all supplies are disabled with reverted turn on sequence detailed in default Power Up Sequencer table. If different turn off sequence is required, a different programming can be done by I2C. DCDC Converter The converter can operate in two modes: PWM mode and PFM mode. In PWM mode the converter operates at a fixed frequency and adapts its duty cycle to regulate to the desired output voltage. The advantage of this mode is that the EMI noise is predictable. However, at lower loadings the efficiency is degraded. In PFM mode some switching pulses are skipped to control the output voltage. This allows maintaining high efficiency even at low loadings. In addition, no high frequency clock is required which provides additional current savings. The switchover point between both modes is chosen depending on the supply conditions such that highest efficiency is obtained over the entire load range. The switch over between PWM/PFM modes can occur automatically but the switcher can be set in auto switching mode PFM / PWM by I2C programming. A soft start is provided to limit inrush currents when enabling the converters. The soft start consists of ramping gradually the reference to the switcher. Additional current limitation is provided by a peak current limiter that monitors and limits the current through the inductor. DCDC converter output voltage can be set by I2C MODEDCDC bit is used to program switcher mode control |
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