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LX1662A Datasheet(PDF) 8 Page - Microsemi Corporation |
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LX1662A Datasheet(HTML) 8 Page - Microsemi Corporation |
8 / 15 page SINGLE-CHIP PROGRAMMABLE PWM CONTROLLERS WITH 5-BIT DAC LX1662/62A, LX1663/63A PRODUCT DA T ABOOK 1996/1997 Copyright © 1999 Rev. 1.1 11/99 8 P RODUCTION D ATA S HEET THEOR Y OF OPERA TION IC OPERATION Referring to the block diagram and typical application circuit, the output turns ON the top MOSFET, allowing the inductor current to increase. At the error comparator threshold, the PWM latch is reset, the top MOSFET turns OFF and the synchronous MOSFET turns ON. The OFF-time capacitor C T is now allowed to discharge. At the valley voltage, the synchronous MOSFET turns OFF and the top MOSFET turns on. A special break-before-make circuit prevents simultaneous conduction of the two MOSFETs. The V CC_CORE pin is offset by +40mV to enhance transient response. The INV pin is connected to the positive side of the current sense resistor, so the controller regulates the positive side of the sense resistor. At light loads, the output voltage will be regulated above the nominal setpoint voltage. At heavy loads, the output voltage will drop below the nominal setpoint voltage. To minimize frequency variation with varying output voltage, the OFF-time is modulated as a function of the voltage at the V CC_CORE pin. ERROR VOLTAGE COMPARATOR The error voltage comparator compares the voltage at the positive side of the sense resistor to the set voltage plus 40mV. An external filter is recommended for high-frequency noise. CURRENT LIMIT Current limiting is done by sensing the inductor current. Exceed- ing the current sense threshold turns the output drive OFF and latches it OFF until the PWM latch Set input goes high again. See Current Limit Section in "Using The LX1662/63 Devices" later in this data sheet. OFF-TIME CONTROL TIMING SECTION The timing capacitor C T allows programming of the OFF-time. The timing capacitor is quickly charged during the ON time of the top MOSFET and allowed to discharge when the top MOSFET is OFF. In order to minimize frequency variations while providing differ- ent supply voltages, the discharge current is modulated by the voltage at the V CC_CORE pin. The OFF-time is inversely proportional to the V CC_CORE voltage. UNDER VOLTAGE LOCKOUT SECTION The purpose of the UVLO is to keep the output drive off until the input voltage reaches the start-up threshold. At voltages below the start-up voltage, the UVLO comparator disables the internal biasing, and turns off the output drives, and the SS (Soft-Start) pin is pulled low. SYNCHRONOUS CONTROL SECTION The synchronous control section incorporates a unique break- before-make function to ensure that the primary switch and the synchronous switch are not turned on at the same time. Approxi- mately 100 nanoseconds of deadtime is provided by the break- before-make circuitry to protect the MOSFET switches. PROGRAMMING THE OUTPUT VOLTAGE The output voltage is set by means of a 5-bit digital Voltage Identification (VID) word (See Table 1). The VID code may be incorporated into the package of the processor or the output voltage can be set by means of a DIP switch or jumpers. For a low or '0' signal, connect the VID pin to ground (DIP switch ON/ CLOSED); for a high or '1' signal, leave the VID pin open (DIP switch OFF/OPEN). The five VID pins on the LX166x series are designed to interface directly with a Pentium Pro or Pentium II processor. Therefore, all inputs are expected to be either ground or floating. Any floating input will be pulled high by internal connections. If using a Socket 7 processor, or other load, the VID code can be set directly by connecting jumpers or DIP switches to the VID[0:4] pins. The VID pins are not designed to take TTL inputs, and should not be connected high. Unpredictable output voltages may result. If the LX166x devices are to be connected to a logic circuit, such as BIOS, for programming of output voltage, they should be buffered using a CMOS gate with open-drain, such as a 74HC125 or 74C906. POWER GOOD SIGNAL (LX1663 only) An open collector output is provided which presents high impedance when the output voltage is between 90% and 117% of the programmed VID voltage, measured at the SS pin. Outside this window the output presents a low impedance path to ground. The Power Good function also toggles low during OVP operation. OVER-VOLTAGE PROTECTION The controller is inherently protected from an over-voltage condition due to its constant OFF-time architecture. However, should a failure occur at the power switch, an over-voltage drive pin is provided (on the LX1663 only) which can drive an external SCR crowbar (Q 3), and so blow a fuse (F1). The fault condition must be removed and power recycled for the LX1663 to resume normal operation (See Figure 9). |
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