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UCC28251 Datasheet(PDF) 37 Page - Texas Instruments

Part No. UCC28251
Description  UCC28251 Advanced PWM Controller With Prebias Operation
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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UCC28251 Datasheet(HTML) 37 Page - Texas Instruments

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IN
pre bias
RAMP
SR _ RAMP
pre bias
V
36 V
V
3.0 V
2 n
2 4
V
V
3.0 V
0.750 V
2 V
2 3.0 V
-
-
-
-
´
´
=
´
=
´
=
´
´
-
m
´
=
=
=
W
=
W
T
1
150ns
3.18 s
2 150kHz
R
47.9 k
66.4pF
66.4pF
R4
47.9 k
UCC28251
www.ti.com
SLUSBD8E – FEBRUARY 2013 – REVISED DECEMBER 2014
Typical Applications (continued)
9.2.1.1 Design Requirements
Table 2 shows the specifications for the design example.
Table 2. Specifications for the Design Example
PARAMETER
MIN
TYP
MAX
UNIT
VIN
Input voltage
36
48
72
VDC
VOUT
Output voltage
3.3
POUT
Outpu power
75
W
IOUT
Output load current
23
A
COUT
Load capacitance
5000
µF
fSW
Switching frequency
150
kHz
PLIMIT
Over-power limit
150%
η
Efficiancy at full load
90%
Isolation
1500
V
9.2.1.2 Detailed Design Procedure
9.2.1.2.1
Step 1: Power Stage Design
The power stage design in this example is standard and the same as that for symmetrical half bridge converter of
voltage mode control. From the standard design, these components are determined. This includes Q1 through
Q4, C1, C2, CT1, D1 and D2, D3, T1, T2 and T3, and U6. Their design is standard. Also, design associated to
current sensing and protection is also standard. This includes CT1, D1, D2, R5 and C5.
9.2.1.2.2
Step 2: Feedback Loop Design
D3 (TLV431) with U6, R6, R9, R10, R12, R13, C11 and C12 are composed of standard type 3 feedback loop
compensation network and output voltage set point. Their design is also standard.
9.2.1.2.3
Step 3: Programming The Device
9.2.1.2.3.1
Step 3-1
Equation 3 is used to determine RT based on switching frequency, 300 kHz and assumes the dead time of 150
ns.
(28)
9.2.1.2.3.2
Step 3-2: Determine Ramp Resistance and Capacitance
There are two-fold considerations to determine RAMP resistance and capacitance. Equation 22 provides RAMP
consideration for SR initial start up with prebias. The corresponding RAMP peak voltage is determined with input
voltage low line and maximum prebias output voltage. In the below T1 turns ratio n = 4.
(29)
Equation 23 and Equation 24 provides RAMP consideration for soft start completion to make duty cycle match
(1-D) = SR_D.
1. Calculate OUTA or OUTB duty cycle at 75-V input voltage, 3.3-V output.
Copyright © 2013–2014, Texas Instruments Incorporated
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