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UCC28251 Datasheet(PDF) 30 Page - Texas Instruments

Part No. UCC28251
Description  UCC28251 Advanced PWM Controller With Prebias Operation
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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UCC28251 Datasheet(HTML) 30 Page - Texas Instruments

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VSENSE
VREF
COMP
FB/EA-
REF /EA+
SS
UCC28251
+
+
C
SS
C
Z2
R
Z2
C
P1
C
Z3
R
Z3
R
O2
R
O1
R
S2
R
S1
VOUT
UCC28251
SLUSBD8E – FEBRUARY 2013 – REVISED DECEMBER 2014
www.ti.com
Application Information (continued)
9.1.2.1 Secondary-Side Control
For secondary-side control, the UCC28251 implements close-loop control of both the primary-side switches and
secondary-side synchronous rectifiers’ duty cycles. This makes it easy to achieve optimal start up performance.
The internal error amplifier is set up as the control loop error amplifier. Connect REF/EA+, FB/EA-, COMP and
VSENSE as shown in Figure 39. To achieve optimal pre-biased start up performance, the output voltage needs
to be directly measured. The UCC28251 uses the VSENSE pin to directly sense this output voltage. Choose the
voltage dividers on VSENSE slightly different to the FB/EA- voltage divider so that the voltage on VSENSE pin is
roughly 10% to 15% more than FB/EA- pin voltages. Select RO1 equal to RS1, and RS2 about 10% to 15% smaller
than RO2.
Figure 39. Error Amplifier Set Up For Secondary-Side Control
The error amplifier uses the lower voltage between the SS pin and the REF/EA+ pin to be the reference voltage
for the feedback loop. In this method, the control loop is said to be ‘closed’ during the entire start up process, as
it is always based on the true output voltage.
During soft start, the primary-side switch duty cycle is controlled by the COMP pin voltage and ramp voltage
generated on the RAMP/CS pin. A higher COMP pin voltage results in larger duty cycle. However, to improve
start up performance, the secondary-side synchronous rectifier duty cycle is controlled by a separate, internal
ramp signal (generated by a dedicated pre-biased start up loop) and by the COMP pin voltage. This dedicated
pre-biased loop is much faster than the regular voltage loop in order to avoid interaction between the two loops.
The start up loop reads the output voltage via a transconductance error amplifier connected to the VSENSE pin.
When the output voltage is higher than the reference, the pre-biased start up loop increases the SR duty cycle to
reduce the output voltage. Conversely, when the output voltage is lower than the reference, the SR duty cycle is
decreased to help maintain higher output voltage. To speed up the start up time, the minimum duty cycle of the
synchronous rectifier is 50%.
Once the soft start is finished, the pre-biased loop is disabled and the duty cycle of the synchronous rectifiers
becomes the complimentary of primary switches’ duty cycle, with some dead time inserted in between.
9.1.2.2 Primary-Side Control
When the UCC28251 is sitting on the primary side, the internal error amplifier is connected as a voltage follower
and an extra error amplifier is needed on the secondary side for closed loop control. The error amplifier
implementation is shown in Figure 40.
30
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Product Folder Links: UCC28251


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