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UCC25710 Datasheet(PDF) 8 Page - Texas Instruments

Part # UCC25710
Description  LLC Half-Bridge Controller For Multi-String LED Lighting
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

UCC25710 Datasheet(HTML) 8 Page - Texas Instruments

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DW Package
(Top View)
VCC
FMIN
GD1
FMAX
GD2
SS
GND
ICOMP
VREF
CS
LEDSW
CREF
DTY
DSR
DADJ
CL
9
10
12
11
DIM
OV
BLON
UV
UCC25710
SLUSAD7A
– APRIL 2011 – REVISED MAY 2011
www.ti.com
SOIC 20-Pin (DW)
Top View
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
BackLight ON is an enable signal for the control device. The signal is active high with a
BLON
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I
threshold of approx 1.2 V. The 5-V reference (VREF) is enabled with BLON which is the bias
supply for many of the internal blocks of the device.
Current Limit input connects to a signal that represents the power converter
’s input current.
CL
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Dual thresholds provide a shutdown retry or latch-off response.
Current REFerence is used to set the regulating voltage for the LED current feedback signal
at the CS input. This voltage input is set using a resistor divider from VREF. A nominal level
of around 0.7 V is recommended although a range of 0.6 V to 2.7 V is accommodated.
CREF
15
I
Internal reference levels of 0.5 V and 2.8 V replace the CREF input voltage at the current
amplifier when the CREF pin voltage is respectively below or above these levels. The 0.5-V
internal reference can be achieved by shorting CREF to ground, the internal 2.8-V reference
can be achieved by shorting CREF to VREF.
Current Sense input monitors the LED current. This signal is compared to VCREF by the
CS
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current amplifier to regulate the total LED current.
A capacitor to ground at the Duty-cycle ADJust input sets the positive slope of a saw tooth
waveform that is compared to a voltage proportional to 1-D where D is the dimming PWM
DADJ
8
I/O
duty-cycle of the DIM input. At the falling edge of the DIM input this comparison is used to
extend the LLC on time beyond the on time of the LED series switch.
A PWM input signal at the DIMming pin controls the average load current by cycling on and
off both an external series LED switch and the gate drives to the LLC converter. A high on
DIM
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this pin corresponds to an ON condition. The controller will ignore a low condition at this
input during start up or fault recovery until after the completion of a soft-start sequence.
The Dimming Slew Rate pin is used to limit the rate of the VCO frequency change at the
LLC on or off edges of a dimming PWM cycle. A capacitor to ground at this pin programs the
DSR
14
I/O
maximum positive and negative slew rates that appear at the control input to the VCO.
Pulling this pin below about 0.8 V will disable the GD outputs.
The DuTY-cycle pin is averaged with a capacitor to ground to form a 1-D proportional
DTY
7
I/O
voltage that is compared to the DADJ saw tooth voltage. The average voltage at this pin will
be 2.5 V(1-D)+0.1 V, where D is the dimming PWM duty-cycle the DIM input.
The MAXimum Frequency of the LLC converter is set by a resistor to ground at this pin. It
FMAX
19
I/O
is actually the difference between the maximum and minimum frequency that is set by this
resistor.
FMIN
20
I/O
The MINimum Frequency of the LLC converter is set by a resistor to ground at this pin.
Gate Drive outputs operate 180
° out of phase with a fixed 500 ns of dead time. They
GD1
&2
2, 3
O
typically will drive either primary end of a gate drive transformer. At start up or during a fault
recovery, initiating the LLC converter begins with GD2 turning on first.
8
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Copyright
© 2011, Texas Instruments Incorporated
Product Folder Link(s): UCC25710


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