NBXSBA051 datasheet(3/6 Pages) ONSEMI

Part #	NBXSBA051

Description	2.5/3.3 V, 533.33 MHz LVPECL Clock Oscillator

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NBXSBA051

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Table 5. DC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 2)

Symbol

Characteristic

Conditions

Min.

Typ.

Max.

Units

IDD

Power Supply Current

95

105

mA

VIH

OE Input HIGH Voltage

2000

VDD

mV

VIL

OE Input LOW Voltage

GND − 300

800

mV

IIH

Input HIGH Current

OE

−100

+100

mA

IIL

Input LOW Current

OE

−100

+100

mA

VOH

Output HIGH Voltage

VDD−1195

VDD−945

mV

VOL

Output LOW Voltage

VDD−1945

VDD−1600

mV

VOUTPP

Output Voltage Amplitude

700

mV

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

2. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4.

Table 6. AC CHARACTERISTICS (VDD = 2.5 V ± 5%; 3.3 V ± 10%, GND = 0 V, TA = −40°C to +85°C) (Note 3)

Symbol

Characteristic

Conditions

Min.

Typ.

Max.

Units

fCLKOUT

Output Clock Frequency

533.33

MHz

Df

Frequency Stability − NBXSBA051

(Note 4)

±50

ppm

FNOISE

Phase−Noise Performance

fCLKout = 533.33 MHz

(See Figure 3)

100 Hz of Carrier

−90

dBc/Hz

1 kHz of Carrier

−108

dBc/Hz

10 kHz of Carrier

−115

dBc/Hz

100 kHz of Carrier

−117

dBc/Hz

1 MHz of Carrier

−123

dBc/Hz

10 MHz of Carrier

−150

dBc/Hz

tjit(F)

RMS Phase Jitter

12 kHz to 20 MHz

0.5

0.7

ps

tjitter

Cycle to Cycle, RMS

1000 Cycles

1.5

8

ps

Cycle to Cycle, Peak−to−Peak

1000 Cycles

10

30

ps

Period, RMS

10,000 Cycles

1

4

ps

Period, Peak−to−Peak

10,000 Cycles

7

20

ps

tOE/OD

Output Enable/Disable Time

200

ns

tDUTY_CYCLE

Output Clock Duty Cycle

(Measured at Cross Point)

48

50

52

%

tR

Output Rise Time (20% and 80%)

250

400

ps

tF

Output Fall Time (80% and 20%)

250

400

ps

tstart

Start−up Time

1

5

ms

Aging

1st Year

3

ppm

Every Year After 1st

1

ppm

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit

board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared

operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit

values are applied individually under normal operating conditions and not valid simultaneously.

3. Measurement taken with outputs terminated with 50 W to VDD − 2.0 V. See Figure 4.

4. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration, and first year aging.

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