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SN74LS90 Datasheet(PDF) 1 Page - ON Semiconductor

Part No. SN74LS90
Description  4-BIT BINARY COUNTER
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Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

SN74LS90 Datasheet(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 6
1
Publication Order Number:
SN74LS90/D
SN74LS90
DECADE COUNTER;
DIVIDE-BY-TWELVE
COUNTER;
4-BIT BINARY COUNTER
The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are
high-speed 4-bit ripple type counters partitioned into two sections.
Each counter has a divide-by-two section and either a divide-by-five
(LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which
are triggered by a HIGH-to-LOW transition on the clock inputs. Each
section can be used separately or tied together (Q to CP) to form BCD,
bi-quinary, modulo-12, or modulo-16 counters. All of the counters
have a 2-input gated Master Reset (Clear), and the LS90 also has a
2-input gated Master Set (Preset 9).
Low Power Consumption ...Typically 45 mW
High Count Rates ...Typically 42 MHz
Choice of Counting Modes . . . BCD, Bi-Quinary, Divide-by-Twelve,
Binary
Input Clamp Diodes Limit High Speed Termination Effects
PIN NAMES
LOADING (Note a)
HIGH
LOW
CP0
Clock (Active LOW going edge) Input to
÷2 Section
0.5 U.L.
1.5 U.L.
CP1
Clock (Active LOW going edge) Input to
÷5 Section (LS90), ÷6 Section (LS92)
0.5 U.L.
2.0 U.L.
CP1
Clock (Active LOW going edge) Input to
÷8 Section (LS93)
0.5 U.L.
1.0 U.L.
MR1, MR2
Master Reset (Clear) Inputs
0.5 U.L.
0.25 U.L.
MS1, MS2
Master Set (Preset-9, LS90) Inputs
0.5 U.L.
0.25 U.L.
Q0
Output from ÷2 Section (Notes b & c)
10 U.L.
5 (2.5) U.L.
Q1, Q2, Q3
Outputs from ÷5 (LS90), ÷6 (LS92),
÷8 (LS93) Sections (Note b)
10 U.L.
5 (2.5) U.L.
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military, (54) and 5 U.L. for commercial (74)
b. Temperature Ranges.
c. The Q0 Outputs are guaranteed to drive the full fan-out plus the CP1 input of the device.
d. To insure proper operation the rise (tr) and fall time (tf) of the clock must be less than 100 ns.
http://onsemi.com
DECADE COUNTER;
DIVIDE-BY-TWELVE COUNTER;
4-BIT BINARY COUNTER
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14
1
14
1
ORDERING INFORMATION
SN54LSXXJ
Ceramic
SN74LSXXN
Plastic
SN74LSXXD
SOIC
14
1
D SUFFIX
SOIC
CASE 751A-02
LOGIC SYMBOL
12
2
VCC = PIN 5
GND = PIN 10
NC = PINS 4, 13
VCC = PIN 5
GND = PIN 10
NC = PINS 2, 3, 4, 13
VCC = PIN 5
GND = PIN 10
NC = PIN 4, 6, 7, 13
LS90
LS92
LS93
67
12
14
1
12
23
MS
CP0
CP1
MR Q0 Q1 Q2 Q3
12 9 8 11
6 7
14
1
1
CP0
CP1
MR Q0 Q1 Q2 Q3
12
9 8
11
14
1
23
CP0
CP1
MR Q0 Q1 Q2 Q3
12 9 8 11


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