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TPS62743 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS62743 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 25 page TPS62743 www.ti.com SLVSCQ0 – JUNE 2015 Feature Description (continued) The DCS-Control™ topology supports PWM (Pulse Width Modulation) mode for medium and high load conditions and a Power Save Mode at light loads. During PWM mode, it operates in continuous conduction mode. The switching frequency is typically 1.2 MHz with a controlled frequency variation depending on the input voltage and load current. If the load current decreases, the converter seamlessly enters Power Save Mode to maintain high efficiency down to very light loads. In Power Save Mode, the switching frequency varies linearly with the load current. Since DCS-Control™ supports both operation modes within one single building block, the transition from PWM to Power Save Mode is seamless with minimum output voltage ripple. The TPS62743 offers both excellent DC voltage and superior load transient regulation, combined with low output voltage ripple, minimizing interference with RF circuits. 9.3.2 Power Save Mode Operation In Power Save Mode the device operates in PFM (Pulse Frequency Modulation) that generates a single switching pulse to ramp up the inductor current and recharges the output capacitor, followed by a sleep period where most of the internal circuits are shutdown to achieve lowest operating quiescent current. During this time, the load current is supported by the output capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During the sleep periods, the current consumption of TPS62743 is reduced to 360 nA. This low quiescent current consumption is achieved by an ultra low power voltage reference, an integrated high impedance feedback divider network and an optimized Power Save Mode operation. 9.3.3 Output Voltage Selection The TPS62743 doesn't require an external resistor divider network to program the output voltage. The device integrates a high impedance feedback resistor divider network that is programmed by the pins VSEL1-3. TPS62743 supports an output voltage range from 1.2 V to 3.3 V. The output voltage is programmed according to Table 1. The output voltage can be changed during operation. This can be used for simple dynamic output voltage scaling. 9.3.4 Output voltage discharge of the buck converter The device provides automatic output voltage discharge when EN is pulled low or the UVLO is triggered. The output of the buck converter is discharged over VOS. Because of this the output voltage will ramp up from zero once the device is enabled again. This is very helpful for accurate start-up sequencing. 9.3.5 Undervoltage Lockout UVLO To avoid misoperation of the device at low input voltages, an undervoltage lockout is used. The UVLO shuts down the device at a maximum voltage level of 2.0 V. The device will start at a UVLO level of 2.15 V. 9.3.6 Short circuit protection The TPS62743 has an integrated current limit on the high side, as well as on the low side MOSFETs. The peak current in the switch is monitored cycle by cycle and typically limited to 600 mA. The High side MOSFET is turned off when the typical current limit of 600mA is reached. The low side MOSFET is turned on when the current decreases below the low side MOSFET current limit of typically 600 mA. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS62743 |
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