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MT48LC8M16A2FC-7E Datasheet(PDF) 54 Page - Micron Technology |
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MT48LC8M16A2FC-7E Datasheet(HTML) 54 Page - Micron Technology |
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54 / 59 page  54 128Mb: x4, x8, x16 SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 128MSDRAM_E.p65 – Rev. E; Pub. 1/02 ©2001, Micron Technology, Inc. 128Mb: x4, x8, x16 SDRAM WRITE – FULL-PAGE BURST tCH tCL tCK tRCD DQM / DQML, DQMH CKE CLK A0-A9, A11 BA0, BA1 A10 tCMS tAH tAS tAH tAS ROW ROW Full-page burst does not self-terminate. Can use BURST TERMINATE command to stop.2, 3 ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) Full page completed DON’T CARE COMMAND tCMH tCMS NOP NOP NOP ACTIVE NOP WRITE BURST TERM NOP NOP ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) DQ DIN m tDH tDS DIN m + 1 DIN m + 2 DIN m + 3 tDH tDS tDH tDS tDH tDS DIN m - 1 tDH tDS tAH tAS BANK ( ) ( ) ( ) ( ) BANK tCMH tCKH tCKS ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) 512 (x16) locations within same row 1,024 (x8) locations within same row 2,048 (x4) locations within same row COLUMN m 1 T0 T1 T2 T3 T4 T5 Tn + 1 Tn + 2 Tn + 3 NOTE: 1. x16: A9 and A11 = “Don’t Care” x8: A11 = “Don’t Care” 2. tWR must be satisfied prior to PRECHARGE command. 3. Page left open; no tRP. *CAS latency indicated in parentheses. -7E -75 -8E SYMBOL* MIN MAX MIN MAX MIN MAX UNITS tCKS 1.5 1.5 2 ns tCMH 0.8 0.8 1 ns tCMS 1.5 1.5 2 ns tDH 0.8 0.8 1 ns tDS 1.5 1.5 2 ns tRCD 15 20 20 ns TIMING PARAMETERS -7E -75 -8E SYMBOL* MIN MAX MIN MAX MIN MAX UNITS tAH 0.8 0.8 1 ns tAS 1.5 1.5 2 ns tCH 2.5 2.5 3 ns tCL 2.5 2.5 3 ns tCK (3) 7 7.5 8 ns tCK (2) 7.5 10 10 ns tCKH 0.8 0.8 1 ns |
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