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MT48LC8M16A2FC-8E Datasheet(PDF) 27 Page - Micron Technology |
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MT48LC8M16A2FC-8E Datasheet(HTML) 27 Page - Micron Technology |
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27 / 59 page  27 128Mb: x4, x8, x16 SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 128MSDRAM_E.p65 – Rev. E; Pub. 1/02 ©2001, Micron Technology, Inc. 128Mb: x4, x8, x16 SDRAM CLK DQ T2 T1 T4 T3 T6 T5 T0 COMMAND WRITE - AP BANK n NOP NOP NOP NOP DIN a + 1 DIN a NOP NOP T7 BANK n BANK m ADDRESS NOTE: 1. DQM is LOW. BANK n, COL a BANK m, COL d READ - AP BANK m Internal States t Page Active WRITE with Burst of 4 Interrupt Burst, Write-Back Precharge Page Active READ with Burst of 4 t tRP - BANK m DOUT d DOUT d + 1 CAS Latency = 3 (BANK m) RP - BANK n WR - BANK n Figure 26 WRITE With Auto Precharge Interrupted by a READ DON’T CARE CLK DQ T2 T1 T4 T3 T6 T5 T0 COMMAND WRITE - AP BANK n NOP NOP NOP NOP DIN d + 1 DIN d DIN a + 1 DIN a + 2 DIN a DIN d + 2 DIN d + 3 NOP T7 BANK n BANK m ADDRESS NOP NOTE: 1. DQM is LOW. BANK n, COL a BANK m, COL d WRITE - AP BANK m Internal States t Page Active WRITE with Burst of 4 Interrupt Burst, Write-Back Precharge Page Active WRITE with Burst of 4 Write-Back WR - BANK n tRP - BANK n t WR - BANK m Figure 27 WRITE With Auto Precharge Interrupted by a WRITE WRITE with Auto Precharge 3. Interrupted by a READ (with or without auto precharge): A READ to bank m will interrupt a WRITE on bank n when registered, with the data-out appear- ing CAS latency later. The PRECHARGE to bank n will begin after tWR is met, where tWR begins when the READ to bank m is registered. The last valid WRITE to bank n will be data-in registered one clock prior to the READ to bank m (Figure 26). 4. Interrupted by a WRITE (with or without auto precharge): A WRITE to bank m will interrupt a WRITE on bank n when registered. The PRECHARGE to bank n will begin after tWR is met, where tWR begins when the WRITE to bank m is registered. The last valid data WRITE to bank n will be data registered one clock prior to a WRITE to bank m (Figure 27). |
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