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MT46V32M16TG-8L Datasheet(PDF) 39 Page - Micron Technology |
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MT46V32M16TG-8L Datasheet(HTML) 39 Page - Micron Technology |
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39 / 68 page  39 512Mb: x4, x8, x16 DDR SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01 ©2001, Micron Technology, Inc. 512Mb: x4, x8, x16 DDR SDRAM ADVANCE TRUTH TABLE 3 – CURRENT STATE BANK n - COMMAND TO BANK n (Notes: 1-6; notes appear below and on next page) CURRENT STATE CS# RAS# CAS# WE# COMMAND/ACTION NOTES Any H X X X DESELECT (NOP/continue previous operation) L H H H NO OPERATION (NOP/continue previous operation) L L H H ACTIVE (select and activate row) Idle L L L H AUTO REFRESH 7 LLLL LOAD MODE REGISTER 7 L H L H READ (select column and start READ burst) 10 Row Active L H L L WRITE (select column and start WRITE burst) 10 L L H L PRECHARGE (deactivate row in bank or banks) 8 Read L H L H READ (select column and start new READ burst) 10 (Auto- L H L L WRITE (select column and start WRITE burst) 10, 12 Precharge L L H L PRECHARGE (truncate READ burst, start PRECHARGE) 8 Disabled) L H H L BURST TERMINATE 9 Write L H L H READ (select column and start READ burst) 10, 11 (Auto- L H L L WRITE (select column and start new WRITE burst) 10 Precharge L L H L PRECHARGE (truncate WRITE burst, start PRECHARGE) 8, 11 Disabled) NOTE: 1. This table applies when CKEn-1 was HIGH and CKEn is HIGH (see Truth Table 2) and after tXSNR has been met (if the previous state was self refresh). 2. This table is bank-specific, except where noted (i.e., the current state is for a specific bank and the com- mands shown are those allowed to be issued to that bank when in that state). Exceptions are covered in the notes below. 3. Current state definitions: Idle: The bank has been precharged, and tRP has been met. Row Active: A row in the bank has been activated, and tRCD has been met. No data bursts/accesses and no register accesses are in progress. Read: A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or been terminated. Write: A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or been terminated. 4. The following states must not be interrupted by a command issued to the same bank. COMMAND INHIBIT or NOP commands, or allowable commands to the other bank should be issued on any clock edge occur- ring during these states. Allowable commands to the other bank are determined by its current state and Truth Table 3, and according to Truth Table 4. Precharging: Starts with registration of a PRECHARGE command and ends when tRP is met. Once tRP is met, the bank will be in the idle state. Row Activating: Starts with registration of an ACTIVE command and ends when tRCD is met. Once tRCD is met, the bank will be in the “row active” state. Read w/Auto- Precharge Enabled: Starts with registration of a READ command with auto precharge enabled and ends when tRP has been met. Once tRP is met, the bank will be in the idle state. Write w/Auto- Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled and ends when tRP has been met. Once tRP is met, the bank will be in the idle state. |
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