MT46V32M16TG-8L datasheet(11/68 Pages) MICRON

Part #	MT46V32M16TG-8L

Description	DOUBLE DATA RATE DDR SDRAM

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Manufacturer	MICRON [Micron Technology]

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11

512Mb: x4, x8, x16 DDR SDRAM

Micron Technology, Inc., reserves the right to change products or specifications without notice.

512Mx4x8x16DDR_B.p65 – Rev. B; Pub 4/01

512Mb: x4, x8, x16

DDR SDRAM

ADVANCE

Table 2

CAS Latency (CL)

Read Latency

The READ latency is the delay, in clock cycles, be-

tween the registration of a READ command and the

availability of the first bit of output data. The latency

can be set to 2, or 2.5 clocks, as shown in Figure 2.

If a READ command is registered at clock edge n,

and the latency is m clocks, the data will be available

nominally coincident with clock edge n + m. Table 2

indicates the operating frequencies at which each CAS

latency setting can be used.

Reserved states should not be used as unknown

operation or incompatibility with future versions may

result.

Figure 2

CAS Latency

Operating Mode

The normal operating mode is selected by issuing a

MODE REGISTER SET command with bits A7-A12 each

set to zero, and bits A0-A6 set to the desired values. A

DLL reset is initiated by issuing a MODE REGISTER

SET command with bits A7 and A9-A12 each set to zero,

bit A8 set to one, and bits A0-A6 set to the desired

values. Although not required by the Micron device,

JEDEC specifications recommend when a LOAD MODE

REGISTER command is issued to reset the DLL, it

should always be followed by a LOAD MODE REGIS-

TER command to select normal operating mode.

All other combinations of values for A7-A12 are re-

served for future use and/or test modes. Test modes

and reserved states should not be used because un-

known operation or incompatibility with future ver-

sions may result.

CK

CK#

COMMAND

DQ

DQS

CL = 2

READ

NOP

READ

NOP

Burst Length = 4 in the cases shown

Shown with nominal tAC and nominal tDSDQ

CK

CK#

COMMAND

DQ

DQS

CL = 2.5

T0

T1

T2

T2n

T3

T3n

T0

T1

T2

T2n

T3

T3n

DON’T CARE

TRANSITIONING DATA

ALLOWABLE OPERATING

FREQUENCY (MHz)

SPEED

CL = 2

CL = 2.5

-75Z

75

≤ f ≤ 133

75

≤ f ≤133

-75

75

≤ f ≤ 100

75

≤ f ≤133

-8

75

≤ f ≤ 100

75

≤ f ≤125

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MT46V32M16TG-8L Datasheet(PDF) 11 Page - Micron Technology

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