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NJU6624C Datasheet(PDF) 6 Page - New Japan Radio

Part No. NJU6624C
Description  14-CHARACTER 1-LINE DOT MATRIX LCD CONTROLLER DRIVER with SMOOTH SCROLL FUNCTION
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Maker  NJRC [New Japan Radio]
Homepage  http://www.njr.co.jp/index_e.htm
Logo NJRC - New Japan Radio

NJU6624C Datasheet(HTML) 6 Page - New Japan Radio

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NJU6624C
NJU6624C
(1-5)Character Generator RAM ( CG RAM )
(1-5)Character Generator RAM ( CG RAM )
The character generator RAM ( CG RAM ) can store any kind of character pattern in 5 x 7 dots written by the user
The character generator RAM ( CG RAM ) can store any kind of character pattern in 5 x 7 dots written by the user
program to display user's original character pattern. The CG RAM can store 32 kind of character in 5 x 7 dots
program to display user's original character pattern. The CG RAM can store 32 kind of character in 5 x 7 dots
mode.
mode.
To display user's original character pattern stored in the CG RAM, the address data (00)
To display user's original character pattern stored in the CG RAM, the address data (00)HH-(1F)
-(1F)HH should be written
should be written
to the DD RAM as shown in Table 2.
to the DD RAM as shown in Table 2.
Table 3. shows the correspondence among the character pattern, CG RAM address and Data.
Table 3. shows the correspondence among the character pattern, CG RAM address and Data.
Table 3. Correspondence of CG RAM address, DD RAM character code
Table 3. Correspondence of CG RAM address, DD RAM character code
and CG RAM character pattern( 5 x 7 dots )
and CG RAM character pattern( 5 x 7 dots )
Notes :
Notes :
1. Character code bit 0 to 4 correspond to the CG RAM address bit 3 to 7(5bits:32 patterns).
1. Character code bit 0 to 4 correspond to the CG RAM address bit 3 to 7(5bits:32 patterns).
2. CG RAM address 0 to 2 designate character pattern line position. The 8th line is Don't care line.
2. CG RAM address 0 to 2 designate character pattern line position. The 8th line is Don't care line.
In case of input CG RAM data continuously, invalid address are Cursor position automatically.
In case of input CG RAM data continuously, invalid address are Cursor position automatically.
3. Character pattern row position correspond to the CG RAM data bits 0 to 4 are shown above.
3. Character pattern row position correspond to the CG RAM data bits 0 to 4 are shown above.
4. CG RAM character patterns are selected when character code of DD RAM bits 5 to 7 are all "0"
4. CG RAM character patterns are selected when character code of DD RAM bits 5 to 7 are all "0"
and these are addressed by character code bits 0 and 1.
and these are addressed by character code bits 0 and 1.
5. "1" for CG RAM data corresponds to display On and "0" to display Off.
5. "1" for CG RAM data corresponds to display On and "0" to display Off.
*=Don't care
*=Don't care
Character Code
(DD RAM Data)
CG RAM Address
Character
Pattern
(CG RAM
Data)
7 6 5 4 3 2 1 0
Upperbit
Lower bit
7 6 5 4 3 2 1 0
Upperbit
Lower bit
4 3 2 1 0
Upper
Lower
bit
bi t
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Character Pattern
Example(1)
<= Cursor Position
0 0 0 0 0 0 0 1
0 0 0 0 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Character Pattern
Example(2)
<= Cursor Position
0 0 0
0 0 1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
0 0 0 1 1 1 1 1
1 1 1 1 1
1 0 0
1 0 1
1 1 0
1 1 1
1 1 1 1 0
1 0 0 0 1
1 0 0 0 1
1 1 1 1 0
1 0 1 0 0
1 0 0 1 0
1 0 0 0 1
* * * * *
1 0 0 0 1
0 1 0 1 0
1 1 1 1 1
0 0 1 0 0
1 1 1 1 1
0 0 1 0 0
0 0 1 0 0
* * * * *


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