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LM26480 Datasheet(PDF) 8 Page - Texas Instruments |
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LM26480 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 42 page LM26480 SNVS543K – JANUARY 2008 – REVISED JANUARY 2015 www.ti.com Low Dropout Regulators, LDO1 and LDO2 (continued) Unless otherwise noted, VIN = 3.6 V, CIN = 1 µF, COUT = 0.47 µF, and values and limits apply for TJ = 25°C, unless otherwise specified. (1)(2)(3)(4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Capacitance for stability 0°C ≤ TJ ≤ 125°C 0.47 −40°C ≤ TJ ≤ 125°C 0.33 µF COUT Output capacitor −40°C ≤ TJ ≤ 125°C 0.68 1 ESR (Equivalent Series Resistance) 5 500 m Ω TJ = −40°C to 125°C 7.7 Buck Converters SW1, SW2 Unless otherwise noted, VIN = 3.6 V, CIN = 10 µF, COUT = 10 µF, LOUT = 2.2 µH, and limits apply for TJ = 25°C, unless otherwise specified. (1) (2) (3) (4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VFB (5) Feedback voltage −3% 3% 2.8 V < VIN < 5.5 V Line regulation 0.089 %/V IOUT = 10 mA VOUT Load regulation 100 mA < IOUT < IMAX 0.0013 %/mA Eff Efficiency Load current = 250 mA 96% ISHDN Shutdown supply current EN is de-asserted 0.01 1 µA Default oscillator frequency = 2 MHz 1.6 2 2.4 Default oscillator frequency = 2.1 MHz 2.1 2.5 ƒOSC Internal oscillator frequency MHz Default oscillator frequency = 2.1 MHz 1.7 TJ = −40°C to 125°C Buck1 peak switching current 2 2.4 limit IPEAK A Buck2 peak switching current 2 2.4 limit No load PFM mode 33 µA IQ Quiescent current on(6) No load PWM mode (forced PWM) 2 mA RDSON (P) Pin-pin resistance PFET 200 400 m Ω RDSON (N) Pin-pin resistance NFET 180 400 TON Turnon time Start-up from shutdown 500 µsec CIN Input capacitor Capacitance for stability 10 µF COUT Output capacitor Capacitance for stability 10 (1) All voltages are with respect to the potential at the GND pin. (2) Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers represent the most likely norm. (3) CIN, COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. (4) The device maintains a stable, regulated output voltage without a load. (5) VIN ≥ VOUT + RDSON(P) (IOUT + 1/2 IRIPPLE). If these conditions are not met, voltage regulation will degrade as load increases. (6) Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT. 8 Submit Documentation Feedback Copyright © 2008–2015, Texas Instruments Incorporated Product Folder Links: LM26480 |
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