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LM3686 Datasheet(PDF) 19 Page - Texas Instruments

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Part No. LM3686
Description  Step-Down DC-DC Converter with Integrated Post Linear Regulators System and Low-Noise Linear Regulator
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3686 Datasheet(HTML) 19 Page - Texas Instruments

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1.0
2.0
3.0
4.0
5.0
DC BIAS (V)
100%
80%
60%
40%
20%
0402, 6.3V, X5R
0603, 10V, X5R
V
PP-RMS
=
V
PP-C
2 + V
PP-ESR
2
LM3686
www.ti.com
SNVS520E – AUGUST 2008 – REVISED MAY 2013
Because these two components are out of phase, the rms (root mean squared) value can be used to get an
approximate value of peak-to-peak ripple. The peak-to-peak ripple voltage, rms value can be expressed as
follow:
(6)
Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series
resistance of the output capacitor (RESR). The RESR is frequency dependent (as well as temperature dependent);
make sure the value used for calculations is at the switching frequency of the part.
COUT_LILO
The linear regulator is designed specifically to work with very small ceramic output capacitors. A ceramic
capacitor (dielectric types X7R, Z5U, or Y5V) in the 2.2 µF range (up to 10 µF) and with an ESR between 3 m
to 300 m
Ω is suitable as COUT_LIN in the LM3686 application circuit.
This capacitor must be located a distance of not more than 1cm from the VOUT_LILO pin and returned to a clean
analogue ground. It is also possible to use tantalum or film capacitors at the device output, VOUT_LILO but these
are not as attractive for reasons of size and cost (see Table 2).
COUT_LDO
A ceramic capacitor in the 1 uF to 2.2 uF range, and with ESR between 5 m
Ω to 500 mΩ, is suitable for the
linear regulator. This output capacitor should be connected no more than 1 cm from VOUT_LDO and QGND
Figure 24. Graph Showing a Typical Variation In Capacitance vs. DC Bias
Table 2. Suggested Capacitors and their Suppliers
Capacitance / µF
Model
Voltage Rating
Vendor
Type
Case Size / Inch (mm)
10.0
C1608X5R0J106K
6.3V
TDK
Ceramic, X5R
0603 (1608)
4.7
C1608X5R0J475
6.3V
TDK
Ceramic, X5R
0603 (1608)
2.2
C1608X5R0J225M
6.3V
TDK
Ceramic, X5R
0603 (1608)
1.0
C1005JB0J105KT
6.3V
TDK
Ceramic, X5R
0402 (1005)
DSBGA Package Assembly And Use
Use of the DSBGA package requires specialized board layout, precision mounting and careful re-flow
techniques, as detailed in the TI AN-1112 Application Report (SNVA009). Refer to the section "Surface Mount
Technology (SMD) Assembly Considerations". For best results in assembly, alignment ordinals on the PC board
should be used to facilitate placement of the device. The pad style used with DSBGA package must be the
NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size.
This prevents a lip that otherwise forms if the soldermask and pad overlap, from holding the device off the
Copyright © 2008–2013, Texas Instruments Incorporated
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