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LM3668 Datasheet(PDF) 5 Page - Texas Instruments |
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LM3668 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 30 page LM3668 www.ti.com SNVS449O – JUNE 2007 – REVISED APRIL 2015 7.4 Thermal Information LM3668 THERMAL METRIC(1) DQB (WSON) UNIT 12 PINS RθJA Junction-to-ambient thermal resistance, WSON package(2) 47.3 RθJC(top) Junction-to-case (top) thermal resistance 43..4 RθJB Junction-to-board thermal resistance 21.6 °C/W ψJT Junction-to-top characterization parameter 0.4 ψJB Junction-to-board characterization parameter 21.7 RθJC(bot) Junction-to-case (bottom) thermal resistance 3.5 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) Junction-to-ambient thermal resistance (RθJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC standard JESD51-7. The test board is a 4-layer FR-4 board measuring 101.6 mm x 76.2 mm x 1.6 mm. Thickness of the copper layers are 2oz/1oz/1oz/2oz. The middle layer of the board is 60 mm x 60 mm. Ambient temperature in simulation is 22°C, still air. Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. 7.5 Electrical Characteristics Unless otherwise noted, specifications apply to the LM3668. VIN = 3.6 V = EN, VOUT = 3.3 V. For VOUT = 4.5V-5 V, VIN = 4 V. (1) (2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VFB Feedback voltage −40°C ≤ TA ≤ 85°C, see (2) –3% 3% Switch peak current limit Open loop(3) 1.85 ILIM A Switch peak current limit Open loop(3), −40°C ≤ TA ≤ 85°C 1.6 2.05 Shutdown supply current EN = 0 V 0.01 ISHDN µA Shutdown supply current EN = 0 V, −40°C ≤ TA ≤ 85°C 1 No load, device is not switching (FB DC bias current in PFM forced higher than programmed output 45 voltage) IQ_PFM µA No load, device is not switching (FB forced higher than programmed output DC bias current in PFM 60 voltage) −40°C ≤ TA ≤ 85°C DC bias current in PWM PWM mode, no switching 600 IQ_PWM µA PWM mode, no switching DC bias current in PWM 750 −40°C ≤ TA ≤ 85°C RDSON(P) Pin-pin resistance for PFET Switches P1 and P2 130 180 m Ω RDSON(N) Pin-pin resistance for NFET Switches N1 and N2 100 150 m Ω PWM mode 2.2 FOSC Internal oscillator frequency MHz PWM mode, −40°C ≤ TA ≤ 85°C 1.9 2.5 FSYNC Sync frequency range VIN = 3.6 V 1.6 2.7 MHz Logic high input for EN, VIH −40°C ≤ TA ≤ 85°C 1.1 V MODE/SYNC pins Logic low input for EN, VIL −40°C ≤ TA ≤ 85°C 0.4 V MODE/SYNC pins 0.3 IEN, MODE, EN, MODE/SYNC pins input current µA SYNC −40°C ≤ TA ≤ 85°C 1 (1) All voltages with respect to SGND. (2) Minimum and Maximum limits are specified by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely norm. (3) Electrical Characteristics table reflects open loop data (FB = 0 V and current drawn from SW pin ramped up until cycle-by-cycle current limits is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LM3668 |
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