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ISL84581IVZ Datasheet(PDF) 8 Page - Intersil Corporation |
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ISL84581IVZ Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 15 page 8 FN6416.3 April 13, 2009 Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS Repeat test for other switches. CL includes fixture and stray capacitance. FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT FIGURE 1. SWITCHING TIMES FIGURE 2A. Q MEASUREMENT POINTS FIGURE 2B. Q TEST CIRCUIT FIGURE 2. CHARGE INJECTION FIGURE 3A. tBBM MEASUREMENT POINTS Repeat test for other switches. CL includes fixture and stray capacitance. FIGURE 3B. tBBM TEST CIRCUIT FIGURE 3. BREAK-BEFORE-MAKE TIME Test Circuits and Waveforms (Continued) 50% tr < 20ns tf < 20ns tTRANS 90% 3V VNOX 0V tTRANS LOGIC INPUT SWITCH OUTPUT 10% VOUT 0V VNO0 V OUT V (NO or NC) R L R L r ON + ------------------------ = LOGIC INPUT VOUT RL COM NO0 ADDA-C 300 Ω 35pF GND NO1-NO6 CL V+ INH C V- C V+ C NO7 V- C VOUT ΔVOUT OFF ON OFF Q = ΔVOUT x CL SWITCH OUTPUT LOGIC INPUT 3V 0V CL VOUT RG VG GND COM NO LOGIC INPUT INH ADDX V- C V+ C Repeat test for other switches. 1nF 0 Ω 80% 3V 0V tBBM LOGIC INPUT SWITCH OUTPUT 0V VOUT tr < 20ns tf < 20ns LOGIC INPUT ADDA-C COM RL CL VOUT 35pF 300 Ω NO0-NO7 GND V+ C INH V- C V+ C ISL84581 |
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