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ISL33003MSOPEVAL1Z Datasheet(PDF) 10 Page - Intersil Corporation |
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ISL33003MSOPEVAL1Z Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 18 page ISL33001, ISL33002, ISL33003 10 FN7560.6 July 11, 2014 Submit Document Feedback Because the signals on each side of the buffer rise independently, the propagation delay can be positive or negative. If the input side rises slowly relative to the output (i.e., heavy capacitive loading on the input and light load on the output) then the propagation delay tPLH is negative. If the output side rises slowly relative to the input, tPLH is positive. For high-to-low transitions, there is a finite propagation delay through the buffer from the time an external low on the input drives the NMOS output low. This propagation delay will always be positive because the buffer connect threshold on the falling edge is below the measurement points of the delay. In addition to the propagation delay of the buffer, there will be additional delay from the different capacitive loading of the buffer. Figures 23 and 24 show how the propagation delay from high-to- low, tPHL, is affected by VCC and capacitive loading. The buffer’s propagation delay times for rising and falling edge signals must be taken into consideration for the timing requirements of the system. SETUP and HOLD times may need to be adjusted to take into account excessively long propagation delay times caused by heavy bus capacitances. Pull-Up Resistor Selection While the ISL33001, ISL33002, ISL33003 2-Channel buffers are designed to improve the rise time of the bus in passive pull-up systems, proper selection of the pull-up resistor is critical for system operation when a buffer is used. For a bus that is operating normally without active rise time circuitry, using the ISL33001, ISL33002, ISL33003 buffer allows larger pull-up resistor values to reduce sink currents when the bus is driving low. However, choose a pull-up resistor value of no larger than 20kΩ regardless of the bus capacitance seen on the SDA/SCL lines. The Bus Idle or Stop Bit condition requires valid logic high voltages to give a valid connection state. Pull-up resistor values 20kΩ or smaller are recommended to overcome the typical 150kΩ impedance of the pre-charge circuitry, delivering valid high levels. |
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