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IN74LS164 Datasheet(PDF) 1 Page - IK Semicon Co., Ltd

Part No. IN74LS164
Description  Fully Buffered Clock and Serial Inputs
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Maker  IKSEMICON [IK Semicon Co., Ltd]
Homepage  http://www.iksemi.com/en/index.html
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IN74LS164 Datasheet(HTML) 1 Page - IK Semicon Co., Ltd

   
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TECHNICAL DATA
IN74LS164
8-Bit Serial-Input/Parallel-Output
Shift Register
ORDERING INFORMATION
IN74LS164N Plastic
IN74LS164D
SOIC
TA =0° to 70°C for all packages
This 8-bit shift register features gated serial inputs and an
asynchronous reset. The gated serial inputs (A and B) permit complete
control over incoming data as a low at either (or both) input(s) inhibits
entry of the new data and resets the first flip flop to the low level at the
next clock pulse. A high level input enables the other input which will
then determine the state of the first flip-flop. Data at the serial inputs may
be changed while the clock is high or low, but only information meeting
the setup requirements will be entered clocking occurs or the low-to-high
level transition of the clock input. All inputs are diode-clamped to
minimize transmission-line effects.
• Gated (Enable/Disable) Serial Inputs
• Fully Buffered Clock and Serial Inputs
• Asynchronous Clear
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Outputs
Reset
Clock
A1 A2
QA QB ... Q
B
H
L
X
X X
L
L
... L
H
Rev. 00
X X
no change
H
H D
D QAn ... QGn
H
D H
D QAn ... QGn
H
L L
L QAn ... QGn
D = data input
X = don’t care
QAn - QGn = data shifted from the previous stage on a
rising edge at the clock input.
PIN 14 =VCC
PIN 7 = GND


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