SY10E175JC datasheet(1/4 Pages) MICREL

Part #	SY10E175JC

Description	9-BIT LATCH WITH PARITY

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Manufacturer	MICREL [Micrel Semiconductor]

Direct Link	http://www.micrel.com

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Function

D0 – D8

Data Inputs

LEN

Latch Enable

MR

Master Reset

Q0 – Q8

Data Outputs

ODDPAR

Parity Output

VCCO

VCC to Output

DESCRIPTION

FEATURES

s 9-bit latch

s Extended 100E VEE range of –4.2V to –5.5V

s Parity detection/generation

s 800ps max. D to Output

s Reset

s Internal 75K

Ω input pull-down resistors

s Fully compatible with Motorola MC10E/100E175

s Available in 28-pin PLCC package

The SY10/100E175 are 9-bit latches. They also feature

a tenth latched output (ODDPAR) which is formed as the

odd parity of the nine data inputs (ODDPAR is HIGH if

an odd number of the inputs are HIGH).

The E175 can also be used to generate byte parity by

using D8 as the parity-type select (L = even parity, H =

odd parity) and using ODDPAR as the byte parity output.

The LEN pin latches the data when asserted with a

logical high and makes the latch transparent when placed

at a logic low level.

9-BIT LATCH

WITH PARITY

Rev.: C

Amendment: /1

Issue Date:

February, 1998

SY10E175

SY100E175

BLOCK DIAGRAM

ODDPAR

D0

LEN

MR

Q8

Q0

D8

bits

1 – 7

D

EN

Q

R

D

EN

Q

R

D

EN

Q

R

PIN CONFIGURATION

PIN NAMES

18

17

16

15

14

13

12

Q6

Q5

VCC

Q4

Q3

VCCO

Q2

5

678

9

10 11

26

27

28

1

2

3

D5

D4

D3

VEE

LEN

MR

D2

4

TOP VIEW

PLCC

J28-1

25 24 23 22 21 20 19

1

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