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ISL76322 Datasheet(PDF) 8 Page - Intersil Corporation |
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ISL76322 Datasheet(HTML) 8 Page - Intersil Corporation |
8 / 14 page ISL76322 8 May 6, 2015 FN7611.3 Submit Document Feedback HIGH SPEED RECEIVER HS Differential Input Voltage VID 75 mVP-P HS Generated Input Common Mode Voltage VICM 2.32 V HS Differential Input Impedance RIN 80 100 120 Ω HS Maximum Jitter Tolerance 0.50 UIP-P I2C I2C Clock Rate (on SCL) fI2C 100 400 kHz I2C Clock Pulse Width (HI or LO) 1.3 µs I2C Clock Low to Data Out Valid 01 µs I2C Start/Stop Setup/Hold Time 0.6 µs I2C Data in Setup Time 100 ns I2C Data in Hold Time 100 ns I2C Data out Hold Time 100 ms NOTES: 8. IDDIO is nominally 50µA and not included in this total as it is dominated by the loading of the parallel pins. 9. This parameter is the output data skew from the invalid edge of PCLK_OUT. The setup and hold time provided to a system is dependent on the PCLK frequency and is calculated as follows: 0.5 * fIN - tDV.. 10. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. Electrical Specifications Unless otherwise indicated, all data is for: VDD_CDR = VDD_CR = 1.8V, VDD_IO = 3.3V, VDD_TX =VDD_P =VDD_AN = 3.3V, TA = +25°C, Ref_Res = 3.16k, High-speed AC-coupling capacitor = 27nF. Boldface limits apply over the operating temperature range, -40°C to +105°C. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN (Note 10)TYP MAX (Note 10)UNIT |
Similar Part No. - ISL76322_15 |
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Similar Description - ISL76322_15 |
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