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MX29F100TTA-90 Datasheet(PDF) 10 Page - Macronix International

Part No. MX29F100TTA-90
Description  1M-BIT [128Kx8/64Kx16] CMOS FLASH MEMORY
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Maker  MCNIX [Macronix International]
Homepage  http://www.macronix.com
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MX29F100TTA-90 Datasheet(HTML) 10 Page - Macronix International

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10
P/N:PM0548
MX29F100T/B
REV. 1.2, NOV. 12, 2001
Pins
A0
A1
Q15~Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0 Code(Hex)
Manufacture code
Word
VIL
VIL
00H
1
1
0
0
0
0
1
0
00C2H
Byte
VIL
VIL
X
1
1
0
0
0
0
1
0
C2H
Device code
Word
VIH
VIL
22H
1
1
0
1
1
0
0
1
22D9H
for MX29F100T
Byte
VIH
VIL
X
1
1
0
1
1
0
0
1
D9H
Device code
Word
VIH
VIL
22H
1
1
0
1
1
1
1
1
22DFH
for MX29F100B
Byte
VIH
VIL
X
1
1
0
1
1
1
1
1
DFH
Sector Protection
X
VIH
X
0
0
0
0
0
0
0
1
01H(Protected)
Verification
X
VIH
X
0
0
0
0
0
0
0
0
00H(Unprotected)
TABLE 3. EXPANDED SILICON ID CODE
ERASE COMMANDS
The Automatic Sector Erase does not require the
device to be entirely pre-programmed prior to executing
the Automatic Set-up Sector Erase command and
Automatic Sector Erase command. Upon executing the
Automatic Sector Erase command, the device will
automatically program and verify the sector(s) memory
for an all-zero data pattern.
The system does not
require to provide any control or timing during these
operations.
When the sector(s) is automatically verified to contain
an all-zero pattern, a self-timed sector erase and
verification begin.
The erase and verification
operations are complete when the data on Q7 is "1"
and the data on Q6 stops toggling for two consecutive
read cycles, at which time the device returns to the
Read mode. The system does not require to provide
any control or timing during these operations.
When using the Automatic Sector Erase algorithm, note
that the erase automatically terminates when
adequate erase margin has been achieved for the
memory array (no erase verified command is
required). Sector erase is a six-bus cycle operation.
There are two "unlock" write cycles.
These are
followed by writing the set-up command 80H. Two
more "unlock" write cycles are then followed by the
sector erase command 30H. The sector address is
latched on the falling edge of WE, while the
command(data) is latched on the rising edge of WE.
Sector addresses selected are loaded into internal
register on the sixth falling edge of WE. Each succes-
sive sector load cycle started by the falling edge of WE
must begin within 30us from the rising edge of the
preceding WE. Otherwise, the loading period ends and
internal auto sector erase cycle starts. (Monitor Q3 to
determine if the sector erase timer window is still open,
see section Q3, Sector Erase Timer.) Any command
other than Sector Erase (30H) or Erase Suspend (B0H)
during the time-out period resets the derice to read
mode.
ERASE SUSPEND
This command is only valid while the state machine is
executing Automatic Sector Erase operation, and there-
fore will only be responded to period during Automatic
Sector Erase operation. Writing the Erase Suspend
command during the Sector Erase time-out immediately
terminates the time-out immediately terminates the
time-out period and suspends the erase operation.
After this command has been executed, the command
register will initiate erase suspend mode. The state
machine will return to read mode automatically after
suspend is ready. At this time, state machine only
allows the command register to respond to the Read
Memory Array, Erase Resume and Program com-
mands.
The system can determine the status of the program
operation using the Q7 or Q6 status bits, just as in the
standard program operation. After an erase-suspend
program operation is complete, the system can once
again read array data within non-suspended sectors.


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