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MX29L1611G Datasheet(PDF) 4 Page - Macronix International |
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MX29L1611G Datasheet(HTML) 4 Page - Macronix International |
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4 / 34 page  4 P/N:PM0604 REV. 0.8, JAN. 24, 2002 MX29L1611G / MX29L1611* Table1. PIN DESCRIPTIONS SYMBOL TYPE NAME AND FUNCTION A0 - A19 INPUT ADDRESS INPUTS: for memory addresses. Addresses are internally latched during a write cycle. Q0 - Q7 INPUT/OUTPUT LOW-BYTE DATA BUS: Input data and commands during Command Interface Register(CIR) write cycles. Outputs array,status and identifier data in the appropriate read mode. Floated when the chip is de-selected or the outputs are disabled. Q8 - Q14 INPUT/OUTPUT HIGH-BYTE DATA BUS: Inputs data during x 16 Data-Write operations. Outputs array, identifier data in the appropriate read mode; not used for status register reads. Floated when the chip is de-selected or the outputs are disabled Q15/A -1 INPUT/OUTPUT Selects between high-byte data INPUT/OUTPUT(BYTE = HIGH) and LSB ADDRESS(BYTE = LOW) for raed operation. CE INPUT CHIP ENABLE INPUTS: Activate the device's control logic, Input buffers, decoders and sense amplifiers. With CE high, the device is deselected and power consumption reduces to Standby level upon completion of any current program or erase operations. CE must be low to select the device. OE INPUT OUTPUT ENABLES: Gates the device's data through the output buffers during a read cycle OE is active low. BYTE/VPP INPUT BYTE ENABLE: While operating read mode, BYTE Low places device in x8 mode. All data is then input or output on Q0-7 and Q8-14 float. AddressQ15/ A-1 selects between the high and low byte. While operating read mode, BYTE high places the device in x16 mode, and turns off the Q15/A-1 input buffer. Address A0, then becomes the lowest order address. ERASE/PROGRAM ENABLE:When BYTE/VPP=11V would place this device into ERASE/PROGRAM mode. VCC DEVICE POWER SUPPLY(3.3V ± 10%) GND GROUND |
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