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MX10EXA Datasheet(PDF) 5 Page - Macronix International

Part # MX10EXA
Description  XA 16-bit Microcontroller Family 64K Flash/2K RAM, Watchdog, 2UARTs
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Manufacturer  MCNIX [Macronix International]
Direct Link  http://www.macronix.com
Logo MCNIX - Macronix International

MX10EXA Datasheet(HTML) 5 Page - Macronix International

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P/N:PM0625 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.0, JUL. 01, 2005
MX10EXA
MNEMONIC
PIN. NO.
TYPE
NAME AND FUNCTION
PLCC
LQFP
P3.0-P3.7
11,13-19
5,7-13
I/O
Port 3: Port 3 is an 8-bit I/O port with a user configurable output type.
Port 3 latches have 1s written to them and are configured in the quasi-
bidirectional mode during reset. the operation of port 3 pins as inputs
and outputs depends upon the port configuration selected. Each port
pin is configured independently. Refer to the section on I/O port con-
figuration and the DC Electrical Characteristics for details.
Port 3 also provides various special functions as described below.
11
5
I
RxD0 (P3.0): Receiver input for serial port 0.
13
7
O
TxD0 (P3.1): Transmitter output for serial port 0.
14
8
I
INT0 (P3.2): External interrupt 0 input.
15
9
I
INT1 (P3.3): External interrupt 1 input.
16
10
I/O
T0 (P3.4): Timer 0 external input, or timer 0 overflow output.
17
11
I/O
T1/BUSW (P3.5): Timer 1 external input, or timer 1 overflow output.
The value on this pin is latched as the external reset input is released
and defines the default external data bus width (BUSW). 0 = 8-bit bus
and 1 = 16-bit bus.
18
12
O
WRL (P3.6): External data memory low byte write strobe.
19
13
O
RD (P3.7): External data memory read strobe.
RST
10
4
I
Reset: A low on this pin resets the microcontroller, causing I/O ports
and peripherals to take on their default states, and the processor to
begin execution at the address contained in the reset vector. Refer to
the section on Reset for details.
ALE
33
27
I/O
Address Latch Enable: A high output on the ALE pin signals external
circuitry to latch the address portion of the multiplexed address/data
bus. A pulse on ALE occurs only when it is needed in order to process
a bus cycle.
PSEN
32
26
O
Program Store Enable: The read strobe for external program memory.
When the microcontroller accesses external program memory, PSEN
is driven low in order to enable memory devices. PSEN is only active
when external code accesses are performed.
EA/WAIT
35
29
I
External Access/Wait/Programming Supply Voltage: The EA input
/VPP
determines whether the internal program memory of the microcontroller
is used for code execution. The value on the EA pin is latched as the
external reset input is released and applies during later execution. When
latched as a 0, external program memory is used exclusively, when
latched as a 1, internal program memory will be used up to its limit, and
external program memory used above that point. After reset is released,
this pin takes on the function of bus Wait input. If Wait is asserted high
during any external bus access, that cycle will be extended until Wait
is released. During EPROM programming, this pin is also the program-
ming supply voltage input.
XTAL1
21
15
I
Crystal 1: Input to the inverting amplifier used in the oscillator circuit
and input to the internal clock generator circuits.
XTAL2
20
14
O
Crystal 2: Output from the oscillator amplifier.


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