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PSMN3R9-25MLC Datasheet(PDF) 8 Page - NXP Semiconductors |
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PSMN3R9-25MLC Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 14 page PSMN3R9-25MLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 15 June 2012 8 of 14 NXP Semiconductors PSMN3R9-25MLC N-channel 25 V 4.15 m Ω logic level MOSFET in LFPAK33 using NextPower Technology Fig 12. Gate charge waveform definitions Fig 13. Gate-source voltage as a function of gate charge; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values Fig 15. Source current as a function of source-drain voltage; typical values 003aaa508 VGS VGS(th) QGS1 QGS2 QGD VDS QG(tot) ID QGS VGS(pl) 003aaj789 0 2 4 6 8 10 0 5 10 15 20 25 Q G (nC) V GS (V) V DS= 20 V 5 V 12.5 V 003aaj790 10 10 2 10 3 10 4 10 -1 1 10 10 2 V DS(V) C (pF) Ciss Crss Coss 003aaj791 0 20 40 60 80 0 0.3 0.6 0.9 1.2 V SD(V) I S (A) Tj = 25 °C Tj = 150 °C |
Similar Part No. - PSMN3R9-25MLC_15 |
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Similar Description - PSMN3R9-25MLC_15 |
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