ISL6208, ISL6208B

2

FN9115.7

July 14, 2014

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Pin Configurations

Block Diagram

ti

Ordering Information

PART NUMBER

(Notes 3, 4)

PART

MARKING

TEMP. RANGE

(°C)

PACKAGE

(Pb-free)

PKG.

DWG. #

ISL6208CBZ (Note 1)

ISL62 08CBZ

-10 to +100

8 Ld SOIC

M8.15

ISL6208CRZ (Note 1)

208Z

-10 to +100

8 Ld 3x3 QFN

L8.3x3

ISL6208BCRZ-T (Note 2)

8BC

-10 to +100

8 Ld 2x2 DFN

L8.2x2D

ISL6208IBZ (Note 1)

ISL62 08IBZ

-40 to +100

8 Ld SOIC

M8.15

ISL6208IRZ (Note 1)

8IRZ

-40 to +100

8 Ld 3x3 QFN

L8.3x3

ISL6208BIRZ-T (Note 2)

8BI

-40 to +100

8 Ld 2x2 DFN

L8.2x2D

NOTES:

1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. Please refer to TB347 for details on reel specifications.

3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin

plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free

products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

4. For Moisture Sensitivity Level (MSL), please see device information page for ISL6208, ISL6208B. For more information on MSL please see techbrief

TB363.

ISL6208CBZ, ISL6208IBZ

(8 LD SOIC)

TOP VIEW

ISL6208CRZ, ISL6208IRZ

(8 LD 3x3 QFN)

TOP VIEW

ISL6208BCRZ, ISL6208BIRZ

(8 LD 2x2 DFN)

TOP VIEW

UGATE

BOOT

PWM

GND

1

2

3

4

8

7

6

5

PHASE

FCCM

VCC

LGATE

7

8

4

3

1

2

6 FCCM

VCC

BOOT

PWM

5

6

1

6 VCC

LGATE

PWM

GND

5

6

6 PHASE

FCCM

7

8

UGATE

BOOT 2

3

4

VCC

PWM

10k

CONTROL

LOGIC

SHOOT-

THROUGH

PROTECTION

BOOT

UGATE

PHASE

LGATE

GND

VCC

FCCM

THERMAL PAD (FOR QFN AND DFN PACKAGE ONLY)

FIGURE 1. BLOCK DIAGRAM