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AFE7222 Datasheet(PDF) 32 Page - Texas Instruments

Part # AFE7222
Description  Analog Front End Wideband Mixed-Signal Transceiver
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AFE7222 Datasheet(HTML) 32 Page - Texas Instruments

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AFE7222
AFE7225
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
www.ti.com
Register Name – CONFIG50 – Address 0x137, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG5(15:8)
CHB_REG5(15:8) – Upper 8 bits for sample 5 for DAC B.
Register Name – CONFIG51 – Address 0x138, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG5(7:0)
CHB_REG5(7:0) – Lower 8 bits for sample 5 for DAC B
Register Name – CONFIG52 – Address 0x139, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG6(15:8)
CHB_REG6(15:8) – Upper 8 bits for sample 6 for DAC B.
Register Name – CONFIG53 – Address 0x13A, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG6(7:0)
CHB_REG6(7:0) – Lower 8 bits for sample 6 for DAC B.
Register Name – CONFIG54 – Address 0x13B, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG7(15:8)
CHB_REG7(15:8) – Upper 8 bits for sample 7 for DAC B.
Register Name – CONFIG55 – Address 0x113C, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG7(7:0)
CHB_REG7(7:0) – Lower 8 bits for sample 7 for DAC B
Register Name – CONFIG56 – Address 0x13D, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG8(15:8)
CHB_REG8(15:8) – Upper 8 bits for sample 8 for DAC B.
Register Name – CONFIG57 – Address 0x13E, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
CHB_REG8(7:0)
CHB_REG8(7:0) – Lower 8 bits for sample 8 for DAC B
Register Name – CONFIG58 – Address 0x13F, Default = 0x00
<7>
<6>
<5>
<4>
<3>
<2>
<1>
<0>
EN_IP_CLK_STOP_DET
EN_FIFO_COLLISION_DET
EN_FIFO_COLLISION_DET – On RESET (and when synced), the read and write pointers of the FIFO are
set 4 positions away. The read pointer increments at the DAC_DCLKIN rate whereas the write pointer
increments at the divided DAC_CLK rate. While the frequencies of these 2 clocks are expected to be the
same, relative phase drifts can cause this relative difference of 4 positions to drift. When the
EN_FIFO_COLLISION_DET bit is set, a collision condition is detected when the relative difference
32
REGISTER DESCRIPTIONS
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Link(s): AFE7222 AFE7225


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