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CSD97370AQ5M Datasheet(PDF) 11 Page - Texas Instruments

Part # CSD97370AQ5M
Description  Synchronous Buck NexFET??Power Stage
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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CSD97370AQ5M Datasheet(HTML) 11 Page - Texas Instruments

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CSD97370AQ5M
www.ti.com
SLPS352A – SEPTEMBER 2011 – REVISED MAY 2012
APPLICATION INFORMATION
The Power Stage CSD97370AQ5M is a highly optimized design for synchronous buck applications using
NexFET devices with a 5V gate drive. The Control FET and Sync FET silicon are parametrically tuned to yield
the lowest power loss and highest system efficiency. As a result, a rating method is used that is tailored towards
a more systems centric environment. The high-performance gate driver IC integrated in the package helps
minimize the parasitics and results in extremely fast switching of the power MOSFETs. System level
performance curves such as Power Loss, Safe Operating Area and normalized graphs allow engineers to predict
the product performance in the actual application.
Power Loss Curves
MOSFET centric parameters such as RDS(ON) and Qgd are primarily needed by engineers to estimate the loss
generated by the devices. In an effort to simplify the design process for engineers, Texas Instruments has
provided measured power loss performance curves. Figure 7 plots the power loss of the CSD97370AQ5M as a
function of load current. This curve is measured by configuring and running the CSD97370AQ5M as it would be
in the final application (see Figure 18). The measured power loss is the CSD97370AQ5M device power loss
which consists of both input conversion loss and gate drive loss. Equation 1 is used to generate the power loss
curve.
Power Loss = (VIN x IIN) + (VDD x IDD) – (VSW_AVG x IOUT)
(1)
The power loss curve in Figure 7 is measured at the maximum recommended junction temperature of
TJ = 125°C under isothermal test conditions.
Safe Operating Curves (SOA)
The SOA curves in the CSD97370AQ5M datasheet give engineers guidance on the temperature boundaries
within an operating system by incorporating the thermal resistance and system power loss. Figure 9, Figure 10,
and Figure 11 outline the temperature and airflow conditions required for a given load current. The area under
the curve dictates the safe operating area. All the curves are based on measurements made on a PCB design
with dimensions of 4.0" (W) x 3.5" (L) x 0.062" (T) and 6 copper layers of 1 oz. copper thickness.
Normalized Curves
The normalized curves in the CSD97370AQ5M data sheet give engineers guidance on the Power Loss and SOA
adjustments based on their application specific needs. These curves show how the power loss and SOA
boundaries will adjust for a given set of systems conditions. The primary Y-axis is the normalized change in
power loss and the secondary Y-axis is the change is system temperature required in order to comply with the
SOA curve. The change in power loss is a multiplier for the Power Loss curve and the change in temperature is
subtracted from the SOA curve.
Copyright © 2011–2012, Texas Instruments Incorporated
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