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DAC5675-EP Datasheet(PDF) 8 Page - Texas Instruments |
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DAC5675-EP Datasheet(HTML) 8 Page - Texas Instruments |
8 / 28 page www.ti.com 50% 50% Valid Data D[13:0]A D[13:0]B CLK CLKC DAC Output I OUT1/IOUT2 t W (LPH) t SU t H t PD t S(DAC) t r(IOUT) t DD 0.1% 0.1% 50% 10% 90% Electrical Characteristics (1) V A + VB 2 V COM = V A V B V A, B V A, B VB V A DV DD DGND Logical Bit Equivalent 1.4 V 1 V 0.4 V − 0.4 V 1 0 0 V DAC5675-EP DAC5675-EP SGLS381A – OCTOBER 2006 – REVISED OCTOBER 2006 Timing Information Figure 1. Timing Diagram over operating free-air temperature range, AV DD = 3.3 V, DVDD = 3.3 V, IO(FS) = 20 mA (unless otherwise noted) RESULTING RESULTING LOGICAL BIT APPLIED DIFFERENTIAL COMMON-MODE BINARY COMMENT VOLTAGES INPUT VOLTAGE INPUT VOLTAGE EQUIVALENT VA (V) VB (V) VA,B (mV) VCOM (V) 1.25 1.15 100 1.2 1 1.15 1.25 –100 1.2 0 Operation with minimum differential voltage 2.4 2.3 100 2.35 1 ( ±100 mV) applied to the complementary inputs 2.3 2.4 –100 2.35 0 versus common-mode range 0.1 0 100 0.05 1 0 0.1 –100 0.05 0 1.5 0.9 600 1.2 1 0.9 1.5 –600 1.2 0 Operation with maximum differential voltage 2.4 1.8 600 2.1 1 ( ±600 mV) applied to the complementary inputs 1.8 2.4 –600 2.1 0 versus common-mode range 0.6 0 600 0.3 1 0 0.6 –600 0.3 0 (1) Specifications subject to change. Figure 2. LVDS Timing Test Circuit and Input Test Levels 8 Submit Documentation Feedback |
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