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SG8080 Datasheet(PDF) 4 Page - Solid State Optronic

Part # SG8080
Description  IGBT Gate Drive Optocoupler
Download  15 Pages
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Manufacturer  SSOUSA [Solid State Optronic]
Direct Link  http://www.ssousa.com
Logo SSOUSA - Solid State Optronic

SG8080 Datasheet(HTML) 4 Page - Solid State Optronic

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© 2015 Solid State Optronics • San José, CA
www.ssousa.com • +1.408.293.4600
Page 4 of 15
SG8080 /H/S/TR
Rev03 (02/02/2015)
002352
SG8080
2A Output Current
IGBT Gate Drive Optocoupler
Electrical Characteristics, continued… TA = 25°C, VEE = Ground and VCC = 30V (unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
Fig.
Notes
Switching Specifications
Propagation Delay Time to
High Output Level
tPLH
100
150
200
nS
IF = 7 to 16mA
VCC = 15 to 30V
VEE = Ground
Rg = 10Ω
Cg = 10nF
f = 10kHz
Duty Cycle = 50%
10
11
12
13
14
23
Propagation Delay Time to
Low Output Level
tPHL
100
150
200
Pulse Width Distortion
PWD
-
-
65
7
Propagation Delay Difference
Between Any Two Parts
PDD
-
-
90
4
Output Rise Time (10 to 90%)
tr
-
25
-
23
Output Fall Time (90 – 10%)
tf
-
25
-
UVLO Turn On Delay
tUVLO ON
-
2
-
S
IF = 10mA, VO > 5V
UVLO Turn Off Delay
tUVLO OFF
-
0.3
-
S
IF = 10mA, VO < 5V
Common Mode Transient Immunity at
HIGH Level Output
| CMH |
10
-
-
kV/
S
IF = 7 to 16mA
VCM = 1500V
TA = 25°C
VCC = 30V
24
5
Common Mode Transient Immunity at
LOW Level Output
| CML |
10
-
-
kV/
S
VF = 0V
VCM = 1500V
TA = 25°C
VCC = 30V
6
Notes
1.
Maximum pulse width = 10
S, maximum duty cycle = 0.2%
2.
Device is considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together
3.
In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥6000 VRMS for one second (leakage
current less than 5
A)
4.
The difference between TPHL and TPLH between any two SG8080 devices under the same test conditions
5.
Common mode transient immunity in HIGH stage is the maximum tolerable negative dVCM/dt on the trailing edge of the common mode
impulse signal, VCM, to assure that the output will remain HIGH
6.
Common mode transient immunity in LOW stage is the maximum tolerable positive dVCM/dt on the leading edge of the common mode
impulse signal, VCM, to assure that the output will remain LOW
7.
Pulse Width Distortion is defined as
|TPHL – TPLH| for any given device
8.
260°C for 10 seconds. Refer to the lead free solder reflow profile for more information
9.
Derate linearly above 70°C free air temperature at a rate of 0.47mW / °C
10. Derate linearly above 70°C free air temperature at a rate of 4.8mW / °C


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