 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DRV8701 Datasheet(PDF) 7 Page - Texas Instruments |
|
|
||||||||||||||||||||||||||||||
DRV8701 Datasheet(HTML) 7 Page - Texas Instruments |
|
|
7 / 42 page  DRV8701 www.ti.com SLVSCX5B – MARCH 2015 – REVISED JULY 2015 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES (VM, AVDD, DVDD) VM VM operating voltage 5.9 45 V IVM VM operating supply current VM = 24 V; nSLEEP high 6 9.5 mA TA = 25°C 9 15 nSLEEP = 0 IVMQ VM sleep mode supply current μA VM = 24 V TA = 125°C (1) 14 25 tSLEEP Sleep time nSLEEP low to sleep mode 100 μs tWAKE Wake-up time nSLEEP high to output change 1 ms tON Turn-on time VM > UVLO to output transition 1 ms DVDD Internal logic regulator voltage External load 0 to 30 mA 3.0 3.3 3.5 V AVDD Internal logic regulator voltage External load 0 to 30 mA 4.4 4.8 5.2 V CHARGE PUMP (VCP, CPH, CPL) VM = 12 V; IVCP = 0 to 12 mA 20.5 21.5 22.5 VCP VCP operating voltage VM = 8 V; IVCP = 0 to 10 mA 13.5 14.4 15 V VM = 5.9 V; IVCP = 0 to 8 mA 9.4 9.9 10.4 VM > 12 V 12 IVCP Charge pump current capacity 8 V < VM < 12 V 10 mA 5.9 V < VM < 8 V 8 fVCP (1) Charge pump switching frequency VM > UVLO 200 400 700 kHz CONTROL INPUTS (PH, EN, IN1, IN2, nSLEEP) VIL Input logic low voltage 0.8 V VIH Input logic high voltage 1.5 V VHYS Input logic hysteresis 100 mV IIL Input logic low current VIN = 0 V –5 5 μA IIH Input logic high current VIN = 5 V 78 μA RPD Pulldown resistance 64 115 173 k Ω tPD Propagation delay PH/EN, IN1/IN2 to GHx/GLx 500 ns CONTROL OUTPUTS (nFAULT, SNSOUT) VOL Output logic low voltage IO = 2 mA 0.1 V IOZ Output high impedance leakage VIN = 5 V –2 2 μA FET GATE DRIVERS (GH1, GH2, SH1, SH2, GL1, GL2) VM > 12 V; VGHS with respect to SHx 8.5 9.5 10.5 High-side VGS gate drive (gate-to- VGHS VM = 8 V; VGHS with respect to SHx 5.5 6.4 7 V source) VM = 5.9 V; VGHS with respect to SHx 3.5 4.0 4.5 VM > 12 V 8.5 9.3 10.5 Low-side VGS gate drive (gate-to- VGLS V source) VM = 5.9 V 3.9 4.3 4.9 Observed tDEAD depends on IDRIVE tDEAD Output dead time 380 ns setting tDRIVE Gate drive time 2.5 μs RIDRIVE < 1 kΩ to GND 6 RIDRIVE = 33 kΩ ±5% to GND 12.5 RIDRIVE = 200 kΩ ±5% to GND, or IDRIVE,SRC Peak source current 25 mA RIDRIVE < 1 kΩ to AVDD RIDRIVE > 500 kΩ ±5% to GND 100 RIDRIVE = 68 kΩ ±5% to AVDD 150 (1) Specified by design and characterization data Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: DRV8701 |
Similar Part No. - DRV8701 |
|
Similar Description - DRV8701 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
