Power

Outputs

PPAD

CP1

CP2

VCP

VCP

VM

VINT

GND

FAULTn

LOCKn

HALLOUT

ISEN

VSW

0.1 µF

1 µF

Hall

U

Hall

V

Hall

W

VM

UHSG

ULSG

U

VM

VHSG

VLSG

V

VM

WHSG

WLSG

W

VM

Optional

HV+

HV±

Optional

HU+

HU±

Optional

HW+

HW±

Hall

Differential

Comparators

+

-

+

-

+

-

Control

Inputs

PWM

Limiter

-

+

SENSE

OCP

-

+

Charge

Pump

VREG

0.1 µF

VM

Hall

Power

VSW or VREG

ENABLE#

1 µF

Core

Logic

VCP

10 V

Phase W

pre-driver

VCP

10 V

Phase V

pre-driver

VCP

10 V

Phase U

pre-driver

1.8-V Linear

Regulator

5-V Linear

Regulator

Oscillator

Thermal

Sensor

10-V Linear

Regulator

10 V

Voltage

Monitoring

BRAKE

PWM

DIR

ENABLEn

bulk

DRV8307

SLVSCK2 – APRIL 2014

www.ti.com

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Hall Comparators

Three comparators are provided to process the raw signals from Hall effect transducers to commutate the motor.

The Hall amplifiers sense zero crossings of the differential inputs and pass the information to digital logic.

The Hall amplifiers have hysteresis, and their detect threshold is centered at 0. Note, hysteresis is defined as

shown in Figure 3:

10

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