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CMX991 Datasheet(PDF) 25 Page - CML Microcircuits
CMLMICRO [CML Microcircuits]
CMX991 Datasheet(HTML) 25 Page - CML Microcircuits
/ 56 page
RF Quadrature Transceiver / RF Quadrature Receiver
2015 CML Microsystems Plc
C-BUS Interface and Register Description
The C-BUS serial interface supports the transfer of control or status information between the
s’ internal registers and an external host. Each C-BUS transaction consists of the host
sending a single Register Address byte, which may then be followed by zero or more data bytes that are
written into the corresponding CMX991/CMX992 register, as illustrated in Figure 19.
Data sent from the host to the Command Data (CDATA) pin is clocked into the CMX991/CMX992 on the
rising edge of the Serial Clock (SCLK) input. The C-BUS interface is compatible with common µC/DSP
serial interfaces and may also be easily implemented with general purpose I/O pins controlled by a simple
software routine. Section 184.108.40.206 gives the detailed C-BUS timing requirements.
Whether a C-BUS register is of a read or write type is fixed for a given C-BUS register address, thus one
cannot both read and write the same C-BUS register address.
In order to provide ease of addressing when using this device with the CMX998, the C-BUS addresses
shown below are arranged so as not to overlap those used on the CMX998. Thus, a common Chip Select
(CSN) signal can be used, as well as common CDATA, RDATA and SCLK signals. Also note that the
General Reset ($10) command on the CMX991/CMX992 differs from other CML devices (such as
CMX998), which use $01 for this General Reset function.
The following C-BUS register addresses are used in the CMX991/CMX992:
Write Only register;
General Reset Register (Address only, no data)
General Control Register, 8-bit write only.
Rx Control Register, 8-bit write only.
Rx Mode Register, 8-bit write only.
Tx Control Register, 8-bit write only.
Tx Mode Register, 8-bit write only.
Tx Gain Register, 8-bit write only
IF PLL M Divider Register, 8-bit write only
IF PLL N Divider Register, 8-bit write only
Read Only register;
General Control Register, 8-bit read only.
Rx Control Register, 8-bit read only.
Rx Mode Register, 8-bit read only.
Tx Control Register, 8-bit read only.
Tx Mode Register, 8-bit read only.
Tx Gain Register, 8-bit read only
IF PLL M Divider Register, 8-bit read only
IF PLL N Divider Register, 8-bit read only
All registers will retain data if DVDD and VDDIO pins are held high, even if all other power supply
pins are disconnected.
If clock and data lines are shared with other devices, DV
IO must be maintained in their
normal operating ranges otherwise ESD protection diodes may cause a problem with loading
signals connected to SCLK, RDATA and CDATA pins, preventing correct programming of other
devices. Other supplies may be turned off and all circuits on the device may be powered down
without causing this problem.
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