INA226-Q1

SBOS743 – JULY 2015

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Register Maps (continued)

Table 4. Register Set Summary (continued)

POINTER

ADDRESS

POWER-ON RESET

HEX

REGISTER NAME

FUNCTION

BINARY

HEX

Sets full-scale range and LSB of current

05h

Calibration Register

and power measurements. Overall

00000000 00000000

0000

R/W

system calibration.

Alert configuration and Conversion

06h

Mask/Enable Register

00000000 00000000

0000

R/W

Ready flag.

Contains the limit value to compare to

07h

Alert Limit Register

00000000 00000000

0000

R/W

the selected Alert function.

Contains unique manufacturer

FEh

Manufacturer ID Register

0101010001001001

5449

R

identification number.

Contains unique die identification

FFh

Die ID Register

0010001001100000

2260

R

number.

7.6.1 Configuration Register (00h) (Read/Write)

Table 5. Configuration Register (00h) (Read/Write) Descriptions

BIT NO.

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

BIT

RST

—

—

—

AVG2

AVG1

AVG0

VBUSCT2

VBUSCT1

VBUSCT0

VSHCT2

VSHCT1

VSHCT0

MODE3

MODE2

MODE1

NAME

POR

0

1

0

0

0

0

0

1

0

0

1

0

0

1

1

1

VALUE

The Configuration Register settings control the operating modes for the device. This register controls the

conversion time settings for both the shunt and bus voltage measurements as well as the averaging mode used.

The operating mode that controls what signals are selected to be measured is also programmed in the

Configuration Register .

The Configuration Register can be read from at any time without impacting or affecting the device settings or a

conversion in progress. Writing to the Configuration Register halts any conversion in progress until the write

sequence is completed resulting in a new conversion starting based on the new contents of the Configuration

Register (00h). This halt prevents any uncertainty in the conditions used for the next completed conversion.

RST:

Reset Bit

Bit 15

Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default

values; this bit self-clears.

AVG:

Averaging Mode

Bits 9–11

Determines the number of samples that are collected and averaged. Table 6 shows all the AVG bit settings and

related number of averages for each bit setting.

Table 6. AVG Bit Settings[11:9] Combinations

AVG2

AVG1

AVG0

NUMBER OF

D11

D10

D9

0

0

0

1

0

0

1

4

0

1

0

16

0

1

1

64

1

0

0

128

1

0

1

256

1

1

0

512

1

1

1

1024

(1)

Shaded values are default.

22

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