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MAX6955AAX Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX6955AAX Datasheet(HTML) 4 Page - Maxim Integrated Products |
4 / 39 page 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan 4 _______________________________________________________________________________________ TIMING CHARACTERISTICS (Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS Serial Clock Frequency fSCL 400 kHz Bus Free Time Between a STOP and a START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD, tSTA 0.6 µs Repeated START Condition Setup Time tSU, tSTA 0.6 µs STOP Condition Setup Time tSU:STO 0.6 µs Data Hold Time tHD, tDAT (Note 3) 0.9 µs Data Setup Time tSU, tDAT 100 ns SCL Clock Low Period tLOW 1.3 µs SCL Clock High Period tHIGH 0.6 µs Rise Time of Both SDA and SCL Signals, Receiving tR (Notes 2, 4) 20 + 0.1CB 300 ns Fall Time of Both SDA and SCL Signals, Receiving tF (Notes 2, 4) 20 + 0.1CB 300 ns Fall Time of SDA Transmitting tF, tX (Notes 2, 5) 20 + 0.1CB 300 ns Pulse Width of Spike Suppressed tSP (Notes 2, 6) 0 50 ns Capacitive Load for Each Bus Line CB (Note 2) 400 pF Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL- of the SCL signal) in order to bridge the undefined region of SCL’s falling edge. Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 5: ISINK ≤ 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. |
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