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AFE5812 Datasheet(PDF) 38 Page - Texas Instruments |
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AFE5812 Datasheet(HTML) 38 Page - Texas Instruments |
38 / 109 page 1 T 16 I/Q CLK Generator 4X/8X Clock D Q INV 1X Clock LNA1 Weight Weight Weight Weight LNA2~8 In-phase CLK Quadrature CLK I/V I/V Summed In-Phase Summed Quadrature AFE5812 SLOS816A – MARCH 2015 – REVISED MARCH 2015 www.ti.com Figure 71. 8 × ƒcw and 4 × ƒcw Block Diagram Figure 72. 8 × ƒcw and 4 × ƒcw Timing Diagram 10.3.5.3 1 × ƒcw Mode The 1 × ƒcw mode requires in-phase and quadrature clocks with low phase noise specifications. The phase delay resolution is also achieved by weighting the in-phase and quadrature signals as described in the 8 × ƒcw and 4 × ƒcw modes. 38 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: AFE5812 |
Similar Part No. - AFE5812_15 |
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Similar Description - AFE5812_15 |
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