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S3515L-S14-T Datasheet(PDF) 2 Page - Unisonic Technologies |
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S3515L-S14-T Datasheet(HTML) 2 Page - Unisonic Technologies |
2 / 8 page S3515 CMOS IC UNISONICTECHNOLOGIESCO.,LTD 2 of 8 www.unisonic.com.tw QW-R502-073,B PIN CONFIGURATION 1 2 3 4 5 6 78 9 10 11 12 13 14 PGO VDD VS5 VS33 VS12 IS33 IS5 PGI GND FPO PSON IS12 RI VS12B PIN DESCRIPTION PIN NO PIN NAME TYPE DESCRIPTION 1 PGI input Power good input. 3 FPO output Fault protection output, open drain output stage. 4 PSON input Power on/off control signal sends from CPU or main-board. The power supply will be turned on/off after 38mS/115mS respectively. 8 IS5 input 5V over current protection. 9 IS33 input 3.3V over current protection. 5 IS12 input 12V over current protection. Regarding typical application, this pin is connected to the positive end of a current shunt through one resistor. When the voltage on IS12 is higher than that of VS12 by 5mV, OCP will be enabled. One current sink, 8 x IREF, is used to determine the voltage drop between the positive end of the current shunt and VS12. Adjusting the value of the external resistor can adjust the threshold for OCP accordingly. The operation for IS5 or IS33 is the same. 6 RI input Current sense setting. An external resistor Ri is connected between RI pin and GND pin will adjust a reference current, IREF = 1.15/Ri, for OCP function. 12 VS5 input 5V over/under-voltage protection. 7 VS12B input Second 12V over/under-voltage protection. 10 VS12 input 12V over/under-voltage protection. 11 VS33 input 3.3V over/under-voltage protection. 13 VDD power Supply voltage. 4V ~ 15V. 14 PGO output Power good logic output, open drain output stage. The power good delay is 300mS from PGI to PGO. 2 GND power Ground. |
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