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9DBV0841 Datasheet(PDF) 4 Page - Integrated Device Technology |
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9DBV0841 Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 16 page 9DBV0841 8-OUTPUT VERY LOW POWER PCIE GEN1-2-3 BUFFER IDT® 8-OUTPUT VERY LOW POWER PCIE GEN1-2-3 BUFFER 4 9DBV0841 REV C 081214 Pin Descriptions (cont.) 39 VDDIO PWR Power supply for differential outputs 40 GND GND Ground pin. 41 DIF6 OUT Differential true clock output 42 DIF6# OUT Differential Complementary clock output 43 vOE6# IN Active low input for enabling DIF pair 6. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 44 DIF7 OUT Differential true clock output 45 DIF7# OUT Differential Complementary clock output 46 vOE7# IN Active low input for enabling DIF pair 7. This pin has an internal pull-down. 1 =disable outputs, 0 = enable outputs 47 VDDIO PWR Power supply for differential outputs 48 ^CKPWRGD_PD# IN Input notifies device to sample latched inputs and start up on first high assertion. Low enters Power Down Mode, subsequent high assertions exit Power Down Mode. This pin has internal pull-up resistor. |
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